PC87591L datasheet(183/437 Pages) NSC

183 / 437 page

Embedded Controller Modules (Continued)

Revision 1.07

183

www.national.com

Voltage Channel 1 Control Register (VCHN1CTL)

This register both controls the operation and indicates the status of Voltage Channel 1. VCHN1CTL is set to 1F16 on reset.

Location: 00 FF3416

Type: Varies per bit

Bit

76543210

Name

DATVAL

CSCALE

INTDVEN

SELIN

Reset

00011111

Bit

Type

Description

4-0

R/W

SELIN (Selected Input). Selects a voltage input to be measured during the next ADC cycle. The new

value should be set before the beginning of the channel measurement. When read, this ﬁeld indicates

to which input the contents of the channel data buffer belongs. When written, it selects a new input for

the next channel measurement. See Figure 60 on page 172 for details on the channel input signals

connection to pins.

The channel is disabled by setting this ﬁeld to 111112. When disabled, the channel is “skipped”,

enabling a higher measurement rate for the remaining channels (shorter ADC cycle). The DATVAL bit

is cleared

Bits

4 3 2 1 0

Description

0 0 0 0 0:

Channel 0

0 0 0 0 1:

Channel 1

....

0 1 0 0 0:

Channel 8 (Available when REMDEN bit in ADCCNF register is cleared)

0 1 0 0 1:

Channel 9 (Available when REMDEN bit in ADCCNF register is cleared)

0 1 0 1 0:

Channel 10

....

0 1 1 0 1:

Channel 13

Other:

Reserved

1 1 1 1 1:

Channel Disabled (default)

R/W

INTDVEN (Interrupt from Data Valid Enable). Enables generation of an ADC interrupt on a Voltage

Channel 1, Data Valid event (End-of-conversion).

0: Disabled (default)

1: Enabled - ADC Interrupt from local DATVAL

R/W

CSCALE (Channel Scale). Controls the input scale of the input for the channel to be converted (as

selected by SELIN ﬁeld).

0: Channel uses the high range scale (default)

1: Channel uses the low range scale

R/W1C DATVAL (Data Valid). Voltage Channel 1 Data Buffer contains new data. The data may be read

immediately or at the end-of-cycle. This ﬂag is cleared when the channel is disabled, when the ADC

module is disabled (ADCEN in ADCCNF register is cleared) or by a write of 1 to it.

0: No new valid data in VCHN1DAT register (default)

1: End of conversion - new data is available in the buffer

PC87591L Datasheet(PDF) 183 Page - National Semiconductor (TI)

PC87591L Datasheet(HTML) 183 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL