LM4931 datasheet(23/47 Pages) NSC

23 / 47 page

Digital Interface Configuration Registers

This register is used to control the format of the PCM, I2S, and GPIO interfaces.

DEFAULT CHART FOR INTERFACES (09h)

DATA BIT

DEFAULT

INTERFACES (09h) (SET = LOGIC 1, CLEAR = LOGIC 0)

Address

Description

PCM_COMPANDED

If set the data is assumed to be in either A-law or

u-law 8-bit companded form, otherwise it is assumed

to be up to 16 bits of MSB first linear 2’s

complement PCM format. (Note 12)

PCM_ALAW_ULAW

If set the data is assumed to be A-law, otherwise it is

u-law companded. (Note 12)

PCM_MS

When set the PCM operates in a master mode.

PCM_LONG

When set the PCM operates in long mode. (Note 12)

2S_MS

When set the I

2S operates in a master mode.

2S_RES

This selects if each word is 16 or 32 bits long: (Note

16)

2S_RES

Word Length

016

132

In 32 bit mode the 18 MSBs are passed to the DAC.

In 16 bit mode all 16 bits are passed to the DAC.

RSVD

RESERVED (Note 14)

RSVD

RESERVED (Note 14)

Note 16: Always operate the digital IO at the lowest frequency possible to save power and reduce noise. Obviously this can limit the resolution of the I2S interface

from 18 bits to 16 bits, but if only 16 bit data is available use the 16 bit mode to reduce I/O power.

LM4931 Datasheet(PDF) 23 Page - National Semiconductor (TI)

LM4931 Datasheet(HTML) 23 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL