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LM4931 Datasheet(PDF) 13 Page - National Semiconductor (TI) |
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LM4931 Datasheet(HTML) 13 Page - National Semiconductor (TI) |
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13 / 47 page ![]() System Control (Continued) When the part is configured as an I 2C device then the LM4931 will respond to one of two addresses, according to the ADDR input. If ADDR is low then the address portion of the I 2C transaction should be set to write to 0010000. When ADDR is high then the address input should be set to write to 1110000. The LM4931 uses the following 11 registers to store configuration information: SYSTEM CONTROL TABLE Address Register Name Description 00000000 BASIC_CONFIG Controls the output mode configuration 00000001 VOICE_CONFIG Controls the settings for the voice codec 00000010 MIC_GAIN Controls the gain and muting of the microphone pre-amplifier 00000011 HP_GAIN Controls the gain and muting of the headphone amplifier 00000100 LS_GAIN Controls the gain and muting of the loudspeaker amplifier 00000101 PLL_M Sets the PLL input divider 00000110 PLL_N Sets the PLL feedback divider 00000111 PLL_P Sets the PLL output divider 00001000 CLK_MUX Configures the clock divider 00001001 INTERFACES Controls the format of the PCM, I 2S and GPIO interfaces 00001010 PMC_CONFIG Controls the power management functions www.national.com 13 |
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