ML7344CE datasheet(136/154 Pages) LAPIS

Part #	ML7344CE

Description	Sub-GHz(160MHz to 510MHz) band short range wireless transceiver IC

PDF	154 Pages

Scroll/Zoom	100%

Manufacturer	LAPIS [LAPIS Semiconductor Co., Ltd.]

Direct Link	http://www.lapis-semi.com/

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136 / 154 page

FEDL7344C/E/J-05

ML7344C/E/J

136/154

■Timing Chart

The followings are operation timing for major functions.

NOTE: Bold characters indicate pins related signals. Non bold characters indicate internal signals.

●Start-up

*1 : For wake-up timing of VDD and RESETN, please refer to the “Reset characteristics”.

*2 : When setting XTAL_EN(CLK_SET2:B0 0x03(4)))=0b1, it is possible to adjust to 10/50/250/500 μs, by

setting OSC_W_SEL[1:0]([ADC_CLK_SET: B1 0x08(6-5)]).

When using TCXO (TCXO_EN([CLK_SET2:B0 0x03(6)])=0b1), clock stabilization time is 5.5μs.

*3 : [VCO_CAL_START:B0 0x6F] and [RF_STATUS:B0 0x0B] resister access is possible, but process is

pending until REG_WAIT_DONE is asserted.

50μs *2

RESETN

OSC/Reg enable

VDD

500μs *1

Clock stabilization time

Regulator voltage wake up time

REG_WAIT_DONE

SPI access

prohibited

RF operation

possible

INT[0]

(CLK stabilized completion)

[INT_SOURCE_GRP1: B0 0x0D]

BANK0, 1 & 3

Access possible

All BANK&FIFO

Access possible

Regulator stabilization time

625μs *3

ML7344CE Datasheet(PDF) 136 Page - LAPIS Semiconductor Co., Ltd.