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MICRF507 Datasheet(PDF) 20 Page - Micrel Semiconductor |
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MICRF507 Datasheet(HTML) 20 Page - Micrel Semiconductor |
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20 / 47 page ![]() Micrel, Inc. MICRF507 October 2, 2013 20 Revision 2.2 Frequency Synthesizer The MICRF507 frequency synthesizer is an integer-N phase-locked loop consisting of: • a reference source, made of an M-divider clocked by the crystal oscillator • a voltage controlled oscillator (VCO) • a programmable frequency divider made of an N-divider, an A-divider, and a dual modulus prescaler • a phase/frequency detector The loop filter is external for flexibility and can be a simple passive circuit. The phase/frequency detector compares the reference frequency (from the M-divider) with the VCO output fed through the programmable frequency divider. The charge pump output of the phase/frequency detector, after filtering, controls the VCO, closing the loop and forcing the error between the reference frequency and the divided VCO frequency to zero. The block diagram, Figure 12, shows the basic elements and arrangement of a PLL-based frequency synthesizer. The MICRF507 has a dual modulus prescaler for increased frequency resolution. In a dual modulus prescaler the main divider is split into two parts, the main part N and an additional divider A, where A < N. Both dividers are clocked from the output of the dual-modulus prescaler, but only the output of the N divider is fed into the phase detector. The prescaler will first divide by 16. Both N and A count down until A reaches zero, at which point the prescaler is switched to a division ratio 16+1. At this point, the divider N has completed A counts. Counting continues until N reaches zero, which is an additional N-A counts. At this point, the cycle repeats. Field Name Number of bits Location of bits Description M0 12 Reg13[3:0], Reg14[7:0] M0 counter A0 6 Reg10[5:0] A0 counter N0 12 Reg11[3:0], Reg12[7:0] N0 counter M1 12 Reg18[3:0], Reg19[7:0] M1 counter A1 6 Reg15[5:0] A1 counter N1 12 Reg16[3:0], Reg17[7:0] N1 counter CP_HI 1 Reg2[7] High charge pump current (1= 500 μA, 0 = 125µA) VCO_Freq 2 Reg3[1:0] Frequency setting of VCO (see Table 11) VCO_IB 3 Reg3[4:2] VCO bias current setting (see Table 11) LD_en 1 Reg1[2] Lock detect function on/off Table 9. Register Bit Fields for Frequency Synthesizer |
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