DS2155 datasheet(104/262 Pages) DALLAS

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DS2156

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IAAR

Idle Array Address Register

7Eh

Bit #

Name

GRIC

GTIC

IAA5

IAA4

IAA3

IAA2

IAA1

IAA0

Default

Bits 0 to 5/Channel Pointer Address Bits (IAA0 to IAA5). These bits select the channel to be programmed with

the idle code defined in the PCICR register. IAA0 is the LSB of the 5-bit channel code. Channel 1 is 01h.

Bit 6/Global Transmit-Idle Code (GTIC). Setting this bit causes all transmit channels to be set to the idle code

written to the PCICR register. This bit must be set = 0 for read operations. The value in bits IAA0–IAA5 must be a

valid transmit channel (01h to 20h for E1 mode; 01h to 18h for T1 mode).

Bit 7/Global Receive-Idle Code (GRIC). Setting this bit causes all receive channels to be set to the idle code

written to the PCICR register. This bit must be set = 0 for read operations. The value in bits IAA0–IAA5 must be a

valid transmit channel (01h to 20h for E1 mode; 01h to 18h for T1 mode).

Table 16-B. GRIC and GTIC Functions

GRIC

GTIC

FUNCTION

Updates a single transmit or receive channel

Updates all transmit channels

Updates all receive channels

Updates all transmit and receive channels

PCICR

Per-Channel Idle Code Register

7Fh

Bit #

Name

Default

Bits 0 to 7/Per-Channel Idle-Code Bits (C0 to C7). This register defines the idle code to be programmed in the

channel selected by the IAAR register. C0 is the LSB of the idle code (this bit is transmitted last).

DS2155 Datasheet(PDF) 104 Page - Dallas Semiconductor