DS2155 datasheet(115/262 Pages) DALLAS

Part #	DS2155

Description	T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface

PDF	262 Pages

Scroll/Zoom	100%

Manufacturer	DALLAS [Dallas Semiconductor]

Direct Link	https://www.maximintegrated.com/en.html

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DS2156

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19.

G.706 INTERMEDIATE CRC-4 UPDATING (E1 MODE ONLY)

The DS2156 can implement the G.706 CRC-4 recalculation at intermediate path points. When this mode

is enabled, the data stream presented at TSER already has the FAS/NFAS, CRC multiframe alignment

word, and CRC-4 checksum in time slot 0. The user can modify the Sa bit positions. This change in data

content is used to modify the CRC-4 checksum. This modification, however, does not corrupt any error

information the original CRC-4 checksum may contain. In this mode of operation, TSYNC must be

configured to multiframe mode. The data at TSER must be aligned to the TSYNC signal. If TSYNC is an

input, then the user must assert TSYNC aligned at the beginning of the multiframe relative to TSER. If

TSYNC is an output, the user must multiframe-align the data presented to TSER.

Figure 19-1. CRC-4 Recalculate Method

TSER

XOR

CRC-4

CALCULATOR

EXTRACT

OLD CRC-4

CODE

INSERT

NEW CRC-4

CODE

MODIFY

Sa BIT

POSITIONS

NEW Sa BIT

DATA

TPOSO/TNEGO

DS2155 Datasheet(PDF) 115 Page - Dallas Semiconductor