DS2155 datasheet(214/262 Pages) DALLAS

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DS2156

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28.

INTERLEAVED PCM BUS OPERATION (IBO)

Note: The interleaved PCM bus operation is not available when UTOPIA backplane is enabled.

In many architectures, the PCM outputs of individual framers are combined into higher speed PCM buses

to simplify transport across the system backplane. The DS2156 can be configured to allow PCM data to

be multiplexed into higher speed buses eliminating external hardware, saving board space and cost. The

DS2156 can be configured for channel or frame interleave.

The interleaved PCM bus operation (IBO) supports three bus speeds. The 4.096MHz bus speed allows

two PCM data streams to share a common bus. The 8.192MHz bus speed allows four PCM data streams

to share a common bus. The 16.384MHz bus speed allows eight PCM data streams to share a common

bus. See Figure 28-1 for an example of four transceivers sharing a common 8.192MHz PCM bus. The

receive elastic stores of each transceiver must be enabled. Through the IBO register, the user can

configure each transceiver for a specific bus position. For all IBO bus configurations, each transceiver is

assigned an exclusive position in the high-speed PCM bus. The 8kHz frame sync can be generated from

the system backplane or from the first device on the bus. All other devices on the bus must have their

frame syncs configured as inputs. Relative to this common frame sync, the devices await their turn to

drive or sample the bus according to the settings of the DA0, DA1, and DA2 bits of the IBOC register.

28.1 Channel Interleave

In channel interleave mode, data is output to the PCM data-out bus one channel at a time from each of the

connected DS2156s until all channels of frame n from each DS2156 have been placed on the bus. This

mode can be used even when the DS2156s are operating asynchronous to each other. The elastic stores

manage slip conditions (Figure 34-22).

28.2 Frame Interleave

In frame interleave mode, data is output to the PCM data-out bus one frame at a time from each of the

DS2156s. This mode is used only when all connected DS2156s are operating in a synchronous fashion

(all inbound T1 or E1 lines are synchronous) and are synchronous with the system clock (system clock

derived from T1 or E1 line). Slip conditions are not allowed in this mode (Figure 34-23).

DS2155 Datasheet(PDF) 214 Page - Dallas Semiconductor