DS2155 datasheet(217/262 Pages) DALLAS

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DS2156

217 of 262

29.

EXTENDED SYSTEM INFORMATION BUS (ESIB)

The extended system information bus (ESIB) allows up to eight DS2156s to share an 8-bit CPU bus for

reporting alarms and interrupt status as a group. With a single bus read, the host can be updated with

alarm or interrupt status from all members of the group. There are two control registers (ESIBCR1 and

ESIBCR2) and four information registers (ESIB1, ESIB2, ESIB3, and ESIB4). For example, eight

DS2156s can be grouped into an ESIB group. A single read of the ESIB1 register of any member of the

group yields the interrupt status of all eight DS2156s. Therefore, the host can determine which device or

devices are causing an interrupt without polling all eight devices. Through ESIB2, the host can gather

synchronization status on all members of the group. ESIB3 and ESIB4 can be programmed to report

various alarms on a device-by-device basis.

There are three device pins involved in forming an ESIB group: ESIBS0, ESIBS1, and ESIBRD. A 10kΩ

pullup resistor must be provided on ESIBS0, ESIBS1, and ESIBRD.

Figure 29-1. ESIB Group of Four DS2156s

ESIB0

ESIB1

ESIBRD

CPU I/F

DS2156 # 1

ESIB0

ESIB1

ESIBRD

CPU I/F

DS2156 # 2

ESIB0

ESIB1

ESIBRD

CPU I/F

DS2156 # 3

ESIB0

ESIB1

ESIBRD

CPU I/F

DS2156 # 4

VDD

10kΩ (3)

DS2155 Datasheet(PDF) 217 Page - Dallas Semiconductor