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70T653MS12BCGI Datasheet(PDF) 22 Page - Integrated Device Technology |
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70T653MS12BCGI Datasheet(HTML) 22 Page - Integrated Device Technology |
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22 / 24 page ![]() IDT70T653M High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges 22 JTAG AC Electrical Characteristics(1,2,3,4,5) 70T653M Symbol Parameter Min. Max. Units tJCYC JTAG Clock Input Period 100 ____ ns tJCH JTAG Clock HIGH 40 ____ ns tJCL JTAG Clock Low 40 ____ ns tJR JTAG Clock Rise Time ____ 3(1) ns tJF JTAG Clock Fall Time ____ 3(1) ns tJRST JTAG Reset 50 ____ ns tJRSR JTAG Reset Recovery 50 ____ ns tJCD JTAG Data Output ____ 25 ns tJDC JTAG Data Output Hold 0 ____ ns tJS JTAG Setup 15 ____ ns tJH JTAG Hold 15 ____ ns 5679 tbl 20 NOTES: 1. Guaranteed by design. 2. 30pF loading on external output signals. 3. Refer to AC Electrical Test Conditions stated earlier in this document. 4. JTAG operations occur at one speed (10MHz). The base device may run at any speed specified in this datasheet. 5. JTAG cannot be tested in sleep mode. JTAG Timing Specifications TCK Device Inputs(1)/ TDI/TMS Device Outputs(2)/ TDO TRST tJCD tJDC tJRST tJS tJH tJCYC tJRSR tJF tJCL tJR tJCH 5679 drw 24 x NOTES: 1. Device inputs = All device inputs except TDI, TMS, TCK and TRST. 2. Device outputs = All device outputs except TDO. |
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