70T653MS12BCGI datasheet(7/24 Pages) IDT

7 / 24 page

IDT70T653M

High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range (VDD = 2.5V ± 100mV)

NOTES:

1. VDDQ is selectable (3.3V/2.5V) via OPT pins. Refer to page 6 for details.

2. Applicable only for TMS, TDI and TRST inputs.

3. Outputs tested in tri-state mode.

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range(3) (VDD = 2.5V ± 100mV)

NOTES:

1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, using "AC TEST CONDITIONS" at input

levels of GND to 3.3V.

2. f = 0 means no address or control lines change. Applies only to input at CMOS level standby.

3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".

4. VDD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 200mA (Typ).

5. CEX = VIL means CE0X = VIL and CE1X = VIH

CEX

= VIH means CE0X = VIH or CE1X = VIL

CEX

< 0.2V means CE0X < 0.2V and CE1X > VDDQX - 0.2V

CEX

> VDDQX - 0.2V means CE0X > VDDQX - 0.2V or CE1X < 0.2V.

"X" represents "L" for left port or "R" for right port.

6. ISB1, ISB2 and ISB4 will all reach full standby levels (ISB3) on the appropriate port(s) if ZZL and /or ZZR = VIH.

70T653MS10

Com'l Only

70T653MS12

Com'l

& Ind

70T653MS15

Com'l Only

Symbol

Parameter

Test Condition

Version

Typ.(4)

Max.

Typ.(4)

Max.

Typ.(4)

Max.

Unit

IDD

Dynamic Operating

Current (Both

Ports Active)

CEL

and CER= VIL,

Outputs Disabled

f = fMAX(1)

COM'L

600

810

600

710

450

600

IND

____

600

790

____

ISB1(6)

Standby Current

(Both Ports - TTL

Level Inputs)

CEL

= CER = VIH

f = fMAX(1)

COM'L

180

240

150

210

120

170

IND

____

150

260

____

ISB2(6)

Standby Current

(One Port - TTL

Level Inputs)

CE"A"

= VIL and CE"B" = VIH(5)

Active Port Outputs Disabled,

f = fMAX(1)

COM'L

400

530

360

460

300

400

IND

____

360

510

____

ISB3

Full Standby Current

(Both Ports - CMOS

Level Inputs)

Both Ports CEL and

CER

> VDDQ - 0.2V,

VIN > VDDQ - 0.2V or VIN < 0.2V,

f = 0(2)

COM'L

420420420

IND

____

440

____

ISB4(6)

Full Standby Current

(One Port - CMOS

Level Inputs)

CE"A"

< 0.2V and

CE"B"

> VDDQ - 0.2V(5)

VIN > VDDQ - 0.2V or VIN < 0.2V,

Active Port, Outputs Disabled,

f = fMAX(1)

COM'L

400

530

460

300

400

IND

____

360

510

____

IZZ

Sleep Mode Current

(Both Ports - TTL

Level Inputs)

ZZL = ZZR = VIH

f = fMAX(1)

COM'L

420420420

IND

____

440

____

5679 tbl 10

Symbol

Parameter

Test Conditions

70T653M

Unit

Min.

Max.

|ILI|

Input Leakage Current(1)

VDDQ = Max., VIN = 0V to VDDQ

___

µA

|ILI|

JTAG & ZZ Input Leakage Current(1,2)

VDD = Max., VIN = 0V to VDD

___

+60

µA

|ILO|

Output Leakage Current(1,3)

CE0

= VIH or CE1 = VIL, VOUT = 0V to VDDQ

___

µA

VOL (3.3V)

Output Low Voltage(1)

IOL = +4mA, VDDQ = Min.

___

0.4

VOH (3.3V)

Output High Voltage(1)

IOH = -4mA, VDDQ = Min.

2.4

___

VOL (2.5V)

Output Low Voltage(1)

IOL = +2mA, VDDQ = Min.

___

0.4

VOH (2.5V)

Output High Voltage(1)

IOH = -2mA, VDDQ = Min.

2.0

___

5679 tbl 09

70T653MS12BCGI Datasheet(PDF) 7 Page - Integrated Device Technology

70T653MS12BCGI Datasheet(HTML) 7 Page - Integrated Device Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL