70T653MS12BCGI datasheet(14/24 Pages) IDT

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IDT70T653M

High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

Timing Waveform of Semaphore Read after Write Timing, Either Side(1)

NOTES:

1. DOR = DOL = VIL, CEL = CER = VIH. Refer to Truth Table II for appropriate BE controls.

2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".

3. This parameter is measured from R/W"A" or SEM"A" going HIGH to R/W"B" or SEM"B" going HIGH.

4. If tSPS is not satisfied,the semaphore will fall positively to one side or the other, but there is no guarantee which side will be granted the semaphore flag.

Timing Waveform of Semaphore Write Contention(1,3,4)

NOTES:

1. CE0 = VIH and CE1 = VIL are required for the duration of both the write cycle and the read cycle waveforms shown above. Refer to Truth Table II for details and for

appropriate BEn controls.

2. "DATAOUT VALID" represents all I/O's (I/O0 - I/O8 and I/O18 - I/O26) equal to the semaphore value.

SEM(1)

5679 drw 12

tAW

tEW

I/O

VALID ADDRESS

tSAA

tWR

tOH

tACE

VALID ADDRESS

DATA

VALID

DATAOUT

tDW

tWP

tDH

tAS

tSWRD

tSOE

Read Cycle

Write Cycle

A0-A2

VALID(2)

tSOP

SEM"A"

5679 drw 13

tSPS

MATCH

W"A"

MATCH

A0"A"-A2"A"

SIDE

"A"

(2)

SEM"B"

W"B"

A0"B"-A2"B"

SIDE

"B"

(2)

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