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70T653MS12BCGI Datasheet(PDF) 9 Page - Integrated Device Technology

Part # 70T653MS12BCGI
Description  HIGH-SPEED 2.5V 512K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
PDF  24 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

70T653MS12BCGI Datasheet(HTML) 9 Page - Integrated Device Technology

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IDT70T653M
High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(4)
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 1).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE= VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time. CE = VIL when
CE0
= VIL and CE1 = VIH. CE = VIH when CE0 = VIH and/or CE1 = VIL.
4. These values are valid regardless of the power supply level selected for I/O and control signals (3.3V/2.5V). See page 6 for details.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(4)
Symbol
Parameter
70T653MS10
Com'l Only
70T653MS12
Com'l
& Ind
70T653MS15
Com'l Only
Unit
Min.
Max.
Min.
Max.
Min.
Max.
READ CYCLE
tRC
Read Cycle Time
10
____
12
____
15
____
ns
tAA
Address Access Time
____
10
____
12
____
15
ns
tACE
Chip Enable Access Time(3)
____
10
____
12
____
15
ns
tABE
Byte Enable Access Time(3)
____
5
____
6
____
7ns
tAOE
Output Enable Access Time
____
5
____
6
____
7ns
tOH
Output Hold from Address Change
3
____
3
____
3
____
ns
tLZ
Output Low-Z Time Chip Enable and Semaphore(1,2)
3
____
3
____
3
____
ns
tLZOB
Output Low-Z Time Output Enable and Byte Enable(1,2)
0
____
0
____
0
____
ns
tHZ
Output High-Z Time(1,2)
04
060
8
ns
tPU
Chip Enable to Power Up Time(2)
0
____
0
____
0
____
ns
tPD
Chip Disable to Power Down Time(2)
____
8
____
8
____
12
ns
tSOP
Semaphore Flag Update Pulse (OE or SEM)
____
4
____
6
____
8ns
tSAA
Semaphore Address Access Time
2
10
2
12
2
15
ns
tSOE
Semaphore Output Enable Access Time
____
5
____
6
____
7ns
5679 tbl 12
Symbol
Parameter
70T653MS10
Com'l Only
70T653MS12
Com'l
& Ind
70T653MS15
Com'l Only
Unit
Min.
Max.
Min.
Max.
Min.
Max.
WRITE CYCLE
tWC
Write Cycle Time
10
____
12
____
15
____
ns
tEW
Chip Enable to End-of-Write(3)
7
____
9
____
12
____
ns
tAW
Address Valid to End-of-Write
7
____
9
____
12
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
0
____
ns
tWP
Write Pulse Width
7
____
9
____
12
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
ns
tDW
Data Valid to End-of-Write
5
____
7
____
10
____
ns
tDH
Data Hold Time
0
____
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
4
____
6
____
8ns
tOW
Output Active from End-of-Write(1,2)
3
____
3
____
3
____
ns
tSWRD
SEM
Flag Write to Read Time
5
____
5
____
5
____
ns
tSPS
SEM
Flag Contention Window
5
____
5
____
5
____
ns
5679 tbl 13



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