34C60 datasheet(21/58 Pages) SMSC

21 / 58 page

SMSC DS – PPC34C60

Page 21

Rev. 06/01/2001

ADVANCED INFORMATION

BIT 4:SO0 - STROBE 0/STANDARD OUTPUT 4

Select Output line 4 (Pin 44) as a General Purpose inverting output.

Select Output line 4 (Pin 44) as a Strobe output.

BIT 5:SO1 - STROBE 1/STANDARD OUTPUT 5

Select Output line 5 (Pin 43) as a General Purpose inverting output.

Select Output line 5 (Pin 43) as a Strobe output.

BIT 6,7:SP0,SP1 - AUTO-POWER/STROBE 2/STANDARD OUTPUT 6

0,x

Select Output line 6 (Pin 42) as an Auto-Power Pin.

1,0

Select Output line 6 (Pin 42) as a General Purpose inverting output.

1,1

Select Output line 6 (Pin 42) as a Strobe output.

OUTPUT REGISTER - 0010 (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

BRESET

nOP6

nPWR

STB2

nOP5

STB1

nOP4

STB0

nOP3

CS3

nOP2

CS2

nOP1

CS1

nOP0

CS0

Each Output Register bit independently controls the operation of its respective Output pin. The function of each output pin,

except for BRST (Pins 94 and 95), is determined by the data stored in the Output Configuration Register.

CHIP SELECT OUTPUTS

Output lines 0-3 (Pins 84-87) are programmable as Chip Selects (CS0-CS3) via the Output Configuration Register. When

programmed as a Chip Select, the output pin will go low during bus operations if its associated bit in the Output Register is

set. If the associated bit is not set in this register, the output pin will remain high.

STROBE OUTPUTS

Output lines 4-6 (Pins 44-42), when programmed as strobes (STB0-STB2) via the Output Configuration Register, will pulse

low for two BUSCLK periods when the associated bit is set. The strobes recover and may be re-written at any time.

Note: the strobe Output Register bits are reset automatically after the strobe is generated.

AUTO-POWER OUTPUT

Output line 6 (Pin 42), when programmed as Auto-Power (nPWR), via the Output Configuration Register, will remain at a

high level as long as host activity is detected. When the chip determines that power may be shut off, this pin will go low.

There are two mechanisms driving this output. The first mechanism monitors the levels on the host port. If the port

assumes the terminated levels or all low levels for 16 to 20 seconds, then the host is presumed off (or disconnected). The

second mechanism monitors Host port activity (signal transitions). After a one minute period of inactivity (given that the

WDOGEN pin is tied low) the watchdog will be triggered sending four beeps to the piezo driver. After completion of the

tones the Auto-Power pin will go low.

GENERAL PURPOSE OUTPUTS

Bit 7 (BRESET) and any other bits that are programmed through the Output Configuration Register as general purpose

output bits are inverted and passed to the associated output pin.

34C60 Datasheet(PDF) 21 Page - SMSC Corporation

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