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DS2196 Datasheet(PDF) 138 Page - Dallas Semiconductor |
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DS2196 Datasheet(HTML) 138 Page - Dallas Semiconductor |
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138 / 157 page ![]() DS2196 138 of 157 Figure 21-6: TRANSMIT SIDE BOUNDARY TIMING TCLK TSER LSB MSB F MSB CHANNEL 1 LSB TCHCLK TSYNC TCHBLK Notes: 1. TSYNC is in the output mode (TCR2.2 = 1) 2. TSYNC is in the input mode (TCR2.2 = 0) 3. TCHBLK is programmed to block channel 4. Shown is TLINK/TLCLK in the ESF framing d TLCLK TLINK LSB MSB CHANNEL 2 TSYNC Don't Care 2 1 4 3 |
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