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AD7770 Datasheet(PDF) 87 Page - Analog Devices |
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AD7770 Datasheet(HTML) 87 Page - Analog Devices |
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87 / 98 page ![]() AD7770 Data Sheet Rev. C | Page 86 of 97 CHANNEL 0 STATUS REGISTER Address: 0x04C, Reset: 0x00, Name: CH0_ERR_REG Channel 0 - Reference detect error AIN0- undervoltage error AIN0+ overvoltage error AIN0- overvoltage error AIN0+ undervoltage error 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [7:5] RESERVED [0] CH0_ERR_REF_DET (R) [4] CH0_ERR_AINM_UV (R) [1] CH0_ERR_AINP_OV (R) [3] CH0_ERR_AINM_OV (R) [2] CH0_ERR_AINP_UV (R) Table 120. Bit Descriptions for CH0_ERR_REG Bits Bit Name Settings Description Reset Access [7:5] RESERVED Reserved 0x0 R/W 4 CH0_ERR_AINM_UV Channel 0—AIN0− Undervoltage Error 0x0 R 3 CH0_ERR_AINM_OV Channel 0—AIN0− Overvoltage Error 0x0 R 2 CH0_ERR_AINP_UV Channel 0—AIN0+ Undervoltage Error 0x0 R 1 CH0_ERR_AINP_OV Channel 0—AIN0+ Overvoltage Error 0x0 R 0 CH0_ERR_REF_DET Channel 0—Reference Detect Error 0x0 R CHANNEL 1 STATUS REGISTER Address: 0x04D, Reset: 0x00, Name: CH1_ERR_REG Channel 1 - Reference detect error AIN1- undervoltage error AIN1+ overvoltage error AIN1- overvoltage error AIN1+ undervoltage error 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [7:5] RESERVED [0] CH1_ERR_REF_DET (R) [4] CH1_ERR_AINM_UV (R) [1] CH1_ERR_AINP_OV (R) [3] CH1_ERR_AINM_OV (R) [2] CH1_ERR_AINP_UV (R) Table 121. Bit Descriptions for CH1_ERR_REG Bits Bit Name Settings Description Reset Access [7:5] RESERVED Reserved 0x0 R/W 4 CH1_ERR_AINM_UV Channel 1—AIN1− Undervoltage Error 0x0 R 3 CH1_ERR_AINM_OV Channel 1—AIN1− Overvoltage Error 0x0 R 2 CH1_ERR_AINP_UV Channel 1—AIN1+ Undervoltage Error 0x0 R 1 CH1_ERR_AINP_OV Channel 1—AIN1+ Overvoltage Error 0x0 R 0 CH1_ERR_REF_DET Channel 1—Reference Detect Error 0x0 R |
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