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AD7771 Datasheet(PDF) 77 Page - Analog Devices |
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AD7771 Datasheet(HTML) 77 Page - Analog Devices |
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77 / 99 page ![]() AD7771 Data Sheet Rev. 0 | Page 76 of 98 GPIO DATA REGISTER Address: 0x018, Reset: 0x00, Name: GPIO_DATA Value s ent to GPIO pins Data read from GPIO pins 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [7:6] RESERVED [2:0] GPIO_WRITE_DATA (R/W) [5:3] GPIO_READ_DATA (R) Table 68. Bit Descriptions for GPIO_DATA Bits Bit Name Settings Description Reset Access [7:6] RESERVED Reserved. 0x0 R/W [5:3] GPIO_READ_DATA Data Read from the GPIO Pins 0x0 R [2:0] GPIO_WRITE_DATA Value Sent to the GPIO Pins 0x0 R/W BUFFER CONFIGURATION 1 REGISTER Address: 0x019, Reset: 0x38, Name: BUFFER_CONFIG_1 Reference buffer pos itive enable Reference buffer negative enable 0 0 1 0 2 0 3 1 4 1 5 0 6 0 7 0 [7] RESERVED [0] RESERVED [6] RESERVED [1] RESERVED [5] RESERVED [2] RESERVED [4] REF_BUF_POS_EN (R/W) [3] REF_BUF_NEG_EN (R/W) Table 69. Bit Descriptions for BUFFER_CONFIG_1 Bits Bit Name Settings Description Reset Access [7:5] RESERVED Reserved 0x0 R/W 4 REF_BUF_POS_EN Reference Buffer Positive Enable 0x1 R/W 3 REF_BUF_NEG_EN Reference Buffer Negative Enable 0x1 R/W [2:0] RESERVED Reserved 0x0 R/W BUFFER CONFIGURATION 2 REGISTER Address: 0x01A, Reset: 0xC0, Name: BUFFER_CONFIG_2 Reference buffer pos itive precharge enable DRegCap Overdrive Enable. Reference buffer negative precharge enable AReg2Cap Overdrive Enable AReg1Cap Overdrive Enable 0 0 1 0 2 0 3 0 4 0 5 0 6 1 7 1 [7] REFBUFP_PREQ (R/W) [0] PDB_DLDO_OVRDRV (R/W) [6] REFBUFN_PREQ (R/W) [1] PDB_ALDO2_OVRDRV (R/W) [5:3] RESERVED [2] PDB_ALDO1_OVRDRV (R/W) Table 70. Bit Descriptions for BUFFER_CONFIG_2 Bits Bit Name Settings Description Reset Access 7 REFBUFP_PREQ Reference Buffer Positive Precharge Enable 0x1 R/W 6 REFBUFN_PREQ Reference Buffer Negative Precharge Enable 0x1 R/W [5:3] RESERVED Reserved 0x0 R/W 2 PDB_ALDO1_OVRDRV AREG1CAP Overdrive Enable 0x0 R/W 1 PDB_ALDO2_OVRDRV AREG2CAP Overdrive Enable 0x0 R/W 0 PDB_DLDO_OVRDRV DREGCAP Overdrive Enable 0x0 R/W |
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