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AD7682 Datasheet(PDF) 12 Page - Analog Devices

Part # AD7682
Description  16-Bit, 4-Channel/8-Channel, 250 kSPS PulSAR ADCs
PDF  35 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7682 Datasheet(HTML) 12 Page - Analog Devices

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AD7682/AD7689
Data Sheet
Rev. H | Page 12 of 35
AD7682
9
8
7
6
5
4
3
2
1
NC
IN1
IN0
VIO
A
VDD
VDD
NC
SDO
B
REF
REFIN
DIN
SCK
C
GND
GND
IN3
CNV
D
NC
IN2
NC
COM
E
Figure 6. AD7682 WLCSP Pin Configuration
AD7689
9
8
7
6
5
4
3
2
1
IN3
IN2
IN0
VIO
A
VDD
VDD
IN1
SDO
B
REF
REFIN
DIN
SCK
C
GND
GND
IN7
CNV
D
IN4
IN5
IN6
COM
E
Figure 7. AD7689 WLCSP Pin Configuration
Table 8. AD7682 WLCSP and AD7689 WLCSP Pin Function Descriptions
Pin No.
AD7682
WLCSP
Mnemonic
AD7689
WLCSP
Mnemonic
Type1
Description
B6, B8
VDD
VDD
P
Power Supply. Nominally 2.5 V to 5.5 V when using an external reference and decoupled
with 10 μF and 100 nF capacitors. When using the internal reference for a 2.5 V output,
the minimum must be 3.0 V. When using the internal reference for 4.096 V output, the
minimum must be 4.6 V.
C9
REF
REF
AI/O
Reference Input/Output. See the Voltage Reference Output/Input section. When the
internal reference is enabled, this pin produces a selectable system reference of 2.5 V or
4.096 V. When the internal reference is disabled and the buffer is enabled, REF produces a
buffered version of the voltage present on the REFIN pin (VDD − 0.5 V, maximum), which
is useful when using low cost, low power references. For improved drift performance,
connect a precision reference to REF (0.5 V to VDD). For any reference method, this pin
needs decoupling with an external 10 μF capacitor connected as close to REF as possible.
See the Reference Decoupling section.
C7
REFIN
REFIN
AI/O
Internal Reference Output/Reference Buffer Input. See the Voltage Reference
Output/Input section. When using the internal reference, the internal unbuffered
reference voltage is present and requires decoupling with a 0.1 μF capacitor. When using
the internal reference buffer, apply a source between 0.5 V and (VDD − 0.5 V) that is
buffered to the REF pin, as described in the REF pin description.
D6, D8
GND
GND
P
Power Supply Ground.
A7
NC
IN3
AI
No Connection (AD7682).
Analog Input Channel 3 (AD7689).
E5
IN2
IN5
AI
Analog Input Channel 2 (AD7682).
Analog Input Channel 5 (AD7689).
E3
NC
IN6
AI
No Connection (AD7682).
Analog Input Channel 6 (AD7689).
D4
IN3
IN7
AI
Analog Input Channel 3 (AD7682).
Analog Input Channel 7 (AD7689).
E1
COM
COM
AI
Common Channel Input. All input channels, IN[7:0], can be referenced to a common-
mode point of 0 V or VREF/2 V.
D2
CNV
CNV
DI
Conversion Input. On the rising edge, CNV initiates the conversion. During conversion, if
CNV is held low, the busy indictor is enabled.



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