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THS4271 Datasheet(PDF) 33 Page - Texas Instruments |
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THS4271 Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 41 page ![]() www.ti.com DRB (S-PDSO-N8) THERMAL INFORMATION THERMAL PAD MECHANICAL DATA Exposed Thermal Pad Dimensions QFND058 NOTE: All linear dimensions are in millimeters Bottom View 14 85 4x0,23 2x0,65 4x0,625 NOM Exposed Thermal Pad This package incorporates an exposed thermal pad that is designed to be attached directly to an external heatsink. The thermal pad must be soldered directly to the printed circuit board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC). For additional information on the Quad Flatpack No-Lead (QFN) package and how to take advantage of its heat dissipating abilities, refer to Application Report, Quad Flatpack No-Lead Logic Packages, Texas Instruments Literature No. SCBA017 and Application Report, 56-Pin Quad Flatpack No-Lead Logic Package, Texas Instruments Literature No. SCEA032. Both documents are available at www.ti.com. The exposed thermal pad dimensions for this package are shown in the following illustration. +0,10 0,15 1,50 +0,10 0,15 1,75 |
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