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CS5530A Datasheet(PDF) 39 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5530A
Description  Geode CS5530A I/O Companion Multi-Function South Bridge
PDF  259 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5530A Datasheet(HTML) 39 Page - National Semiconductor (TI)

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Revision 1.1
39
www.national.com
Signal Definitions (Continued)
Display MPEG
VID_DATA[7:0]
C12,
B12,
A12,
D11,
C11,
B13,
C13,
A11
I
Video Data Port
This is the input data for a video (MPEG) or graphics overlay in its native
form. For video overlay, this data is in an interleaved YUV 4:2:2 format. For
graphics overlay, the data is in RGB 5:6:5 format. This port operates at the
VID_CLK rate.
VID_CLK
A6
I
Video Clock
This is the clock for the video port. This clock is completely asynchronous to
the input pixel clock rate.
VID_VAL
B7
I
Video Valid
This signal indicates that valid video data is being presented on the
VID_DATA input port. If the VID_RDY signal is also asserted, the data will
advance.
VID_RDY
B10
O
Video Ready
This signal indicates that the CS5530A is ready to receive the next piece of
video data on the VID_DATA port. If the VID_VAL signal is also asserted, the
data will advance.
2.2.12 DCLK PLL
Signal Name
Pin
No.
Pin
Type
Description
PLLTEST
N23
--
PLLTEST
Internal test pin. This pin should not be connected for normal operation.
PLLVAA
M25
I
Analog
Analog PLL Power (VDD)
PLLVAA is the analog positive rail power connection to the PLL.
PLLAGD
N25
I
Analog
Analog PLL Ground (VSS)
PLLAGD is the analog ground rail connection to the PLL.
PLLDVD
M23
I
Analog
Digital PLL Power (VDD)
This pin is the digital VDD power connection for the PLL.
PLLDGN
N26
I
Analog
Digital PLL Ground (VSS)
This pin is the digital ground (VSS) connection for the PLL.
2.2.11 Display Interface (Continued)
Signal Name
Pin
No.
Pin
Type
Description



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