CS5530A datasheet(73/259 Pages) NSC

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Functional Description (Continued)

3.4.3.2

General Purpose Timers

The CS5530A contains two general purpose timers, Gen-

eral Purpose Timer 1 (F0 Index 88h) and General Purpose

Timer 2 (F0 Index 8Ah). These two timers are similar to the

Device Idle Timers in that they count down to zero unless

re-triggered, and generate an SMI when they reach zero.

However, these are 8-bit timers instead of 16 bits, they

have a programmable timebase, they are not enabled or

disabled by Global Power Management bits F0 Index

80h[1:0], and the events which reload these timers are con-

figurable. These timers are typically used for an indication

of system inactivity for Suspend determination.

General Purpose Timer 1 can be re-triggered by activity to

any of the configured user defined devices, keyboard and

mouse, parallel and serial, floppy disk, or hard disk.

General Purpose Timer 2 can be re-triggered by a transi-

tion on the GPIO7 pin (if GPIO7 is properly configured).

Configuration of the GPIO7 is explained in Section 3.4.3.4

"General Purpose I/O Pins" on page 76.

The timebase for both general purpose timers can be con-

figured as either 1 second (default) or 1 millisecond. The

registers at F0 Index 89h and 8Bh are the control registers

for the general purpose timers. Table 3-28 show the bit for-

mats for these registers.

After a general purpose timer is enabled or after an event

reloads the timer, the timer is loaded with the configured

count value. Upon expiration of the timer an SMI is gener-

ated and a status flag is set. Once expired, this timer must

be re-initialized by disabling and enabling it.

The general purpose timer is not loaded immediately, but

when the free-running timebase counter reaches its maxi-

mum value. Depending on the count at the time, this could

be on the next 32 KHz clock (CLK_32K), or after a full

count of 32, or 32,768 clocks (approximately 1 msec, or

exactly 1 sec). The general purpose timer cannot trigger an

interrupt until after the first count. Thus, the minimum time

before the next SMI from the timer can be either from 1-

2 msec or 1-2 sec with a setting of 02h.

Table 3-28. General Purpose Timers and Control Registers

Bit

Description

F0 Index 88h

General Purpose Timer 1 Count Register (R/W)

Reset Value = 00h

7:0

General Purpose Timer 1 Count: This register holds the load value for GP Timer 1. This value can represent either an 8-

bit or 16-bit timer (selected at F0 Index 8Bh[4]). It is loaded into the timer when the timer is enabled (F0 Index 83h[0] =1).

Once enabled, an enabled event (configured in F0 Index 89h[6:0]) reloads the timer.

The timer is decremented with each clock of the configured timebase. Upon expiration of the timer, an SMI is generated and

the top level SMI status is reported at F1BAR+Memory Offset 00h/02h[9]. The second level SMI status is reported at

F1BAR+Memory Offset 04h/06h[0]).

Once expired, this timer must be re-initialized by either disabling and enabling it, or writing a new count value here.

This timer’s timebase can be configured as 1 msec or 1 sec at F0 Index 89h[7].

F0 Index 89h

General Purpose Timer 1 Control Register (R/W)

Reset Value = 00h

Timebase for General Purpose Timer 1: Selects timebase for GP Timer 1 (F0 Index 88h). 0 = 1 sec; 1 = 1 msec.

Re-trigger General Purpose Timer 1 on User Defined Device 3 (UDEF3) Activity: 0 = Disable; 1 = Enable.

Any access to the configured (memory or I/O) address range for UDEF3 reloads GP Timer 1. UDEF3 address

programming is at F0 Index C8h (base address register) and CEh (control register).

Re-trigger General Purpose Timer 1 on User Defined Device 2 (UDEF2) Activity: 0 = Disable; 1 = Enable.

Any access to the configured (memory or I/O) address range for UDEF2 reloads GP Timer 1. UDEF2 address

programming is at F0 Index C4h (base address register) and CDh (control register).

Re-trigger General Purpose Timer 1 on User Defined Device 1 (UDEF1) Activity: 0 = Disable; 1 = Enable.

Any access to the configured (memory or I/O) address range for UDEF1 reloads GP Timer 1. UDEF1 address

programming is at F0 Index C0h (base address register) and CCh (control register)

Re-trigger General Purpose Timer 1 on Keyboard or Mouse Activity: 0 = Disable; 1 = Enable

Any access to the keyboard or mouse I/O address range (listed below) reloads GP Timer 1.

Keyboard Controller: I/O Ports 060h/064h

COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is included)

COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is included)

Re-trigger General Purpose Timer 1 on Parallel/Serial Port Activity: 0 = Disable; 1 = Enable.

Any access to the parallel or serial port I/O address range (listed below) reloads the GP Timer 1.

LPT1: I/O Port 378h-37Fh, 778h-77Ah

LPT2: I/O Port 278h-27Fh, 678h-67Ah

COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is excluded)

COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is excluded)

COM3: I/O Port 3E8h-3EFh

COM4: I/O Port 2E8h-2EFh

CS5530A Datasheet(PDF) 73 Page - National Semiconductor (TI)

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