DRV10975ZPWPR datasheet(14/65 Pages) TI1

14 / 65 page

VCC

SWGND

VREG

3.3 V/5 V

Load

47 µH

10 µF

VCC

SWGND

VREG

3.3 V/5 V

39 Ω

10 µF

DRV10975, DRV10975Z

SLVSCP2E – JANUARY 2015 – REVISED MAY 2018

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Product Folder Links: DRV10975

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8.3 Feature Description

8.3.1 Regulators

8.3.1.1 Step-Down Regulator

The DRV10975 includes a hysteretic step-down voltage regulator that can be operated as either a switching buck

regulator using an external inductor or as a linear regulator using an external resistor (see Figure 3). The best

efficiency is achieved when the step-down regulator is in buck mode. However, the DRV10975Z device (sleep

mode version) only operates with the step-down regulator in linear mode and with a Zener diode as described in

the Typical Application section. The regulator output voltage can be configured by register bit VregSel. When

VregSel = 0, the regulator output voltage is 5 V, and when VregSel = 1, the regulator output voltage is 3.3 V.

When the regulated voltage drops by the hysteresis level, the high-side FET turns on to increase the regulated

voltage back to the target of 3.3 V or 5 V. The switching frequency of the hysteretic regulator is not constant and

changes with the load.

If the step-down regulator is configured in buck mode, see IREG_MAX in the Electrical Characteristics to determine

the amount of current provided for external load. If the step-down regulator is configured as linear mode, it is

used for the device internal circuit only.

NOTE

The DRV10975Z step-down regulator only operates in linear mode (using an external

resistor) and with a Zener diode as described in the Typical Application section. The

DRV10975Z device does not support buck mode (using an external inductor) as shown in

Figure 3.

Step-Down Regulator With External Inductor (Buck

Mode)

Step-Down Regulator With External Resistor (Linear

Mode)

Figure 3. Step-Down Regulator Configurations

8.3.1.2 3.3-V and 1.8-V LDO

The DRV10975 includes a 3.3-V LDO and an 1.8-V LDO. The 1.8-V LDO is for internal circuit only. The 3.3-V

LDO is mainly for internal circuits, but can also drive external loads not to exceed IV3P3_MAX listed in the Electrical

Characteristics. For example, it can work as a pullup voltage for the FG, DIR, SDA, and SCL interface.

Both V1P8 and V3P3 capacitor must be connected to GND.

8.3.2 Protection Circuits

8.3.2.1 Thermal Shutdown

The DRV10975 has a built-in thermal shutdown function, which shuts down the device when junction

temperature is more than TSDN ˚C and recovers operating conditions when junction temperature falls to TSDN –

TSDN_HYS˚C.

The OverTemp status bit (address 0x10 bit 7) is set during thermal shutdown.

DRV10975ZPWPR Datasheet(PDF) 14 Page - Texas Instruments

DRV10975ZPWPR Datasheet(HTML) 14 Page - Texas Instruments

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