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DRV10975ZPWPR Datasheet(PDF) 16 Page - Texas Instruments |
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DRV10975ZPWPR Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 65 page ![]() V CC V / 2 CC 100% PWM DCO 50% PWM DC0 U-V V-W W-U U V W PWM Output Average Value 16 DRV10975, DRV10975Z SLVSCP2E – JANUARY 2015 – REVISED MAY 2018 www.ti.com Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated Feature Description (continued) When any phase is measured with respect to ground, the waveform is sinusoidally coupled with third-order harmonics. This encoding technique permits one phase to be held at ground while the other two phases are pulse-width modulated. Figure 5 and Figure 6 show the sinusoidal encoding technique used in the DRV10975. Figure 5. PWM Output and the Average Value Sinusoidal voltage from phase to phase Sinusoidal voltage with third order harmonics from phase to GND Figure 6. Representing Sinusoidal Voltages With Third-Order Harmonic Output The output amplitude is determined by the magnitude of VCC and the PWM duty cycle output (PWM_DCO). The PWM_DCO represents the peak duty cycle that is applied in one electrical cycle. The maximum amplitude is reached when PWM_DCO is at 100%. The peak output amplitude is VCC. When the PWM_DCO is at 50%, the peak amplitude is VCC / 2 (see Figure 7). Figure 7. Output Voltage Amplitude Adjustment 8.3.4 Sleep or Standby Condition The DRV10975 is available in either a sleep mode or standby mode version. The DRV10975 enters either sleep or standby to conserve energy. When the device enters either sleep or standby, the motor stops driving. The step-down regulator is disabled in the sleep mode version to conserve more energy. The I2C interface is disabled and any register data not stored in EEPROM will be reset. The step-down regulator remains active in the standby mode version. The register data is maintained, and the I2C interface remains active. Setting sleepDis = 1 prevents the device from entering into the sleep or standby condition. If the device has already entered into sleep or standby condition, setting sleepDis = 1 will not take it out of the sleep or standby condition. During a sleep or standby condition, the Slp_Stdby status bit (address 0x10, bit 6) will be set. |
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