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DRV10975ZPWPR Datasheet(PDF) 9 Page - Texas Instruments |
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DRV10975ZPWPR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 65 page  9 DRV10975, DRV10975Z www.ti.com SLVSCP2E – JANUARY 2015 – REVISED MAY 2018 Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated Electrical Characteristics (continued) over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDIG_IL PWM input low voltage 0.6 V ƒPWM PWM input frequency 1 100 kHz STANDBY MODE (DRV10975) VEN_SB Analog voltage-to-enter standby mode SpdCtrlMd = 0 (analog mode) 30 mV VEX_SB Analog voltage-to-exit standby SpdCtrlMd = 0 (analog mode) 120 mV tEX_SB_ANA Time-to-exit from standby mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SB 700 ms tEX_SB_DR_ANA Time taken to drive motor after exiting from standby mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SB; ISDen = 0; BrkDoneThr[2:0] = 0 1 µs tEX_SB_PWM Time-to-exit from standby mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH 1 µs tEX_SB_DR_PWM Time taken to drive motor after exiting from standby mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0 55 ms tEN_SB_ANA Time-to-enter standby mode SpdCtrlMd = 0 (analog mode) SPEED < VEN_SB; AvSIndEn = 0 5 ms tEN_SB_PWM Time-to-enter standby mode SpdCtrlMd = 1 (PMW mode) SPEED < VDIG_IL; AvSIndEn = 0 60 ms SLEEP MODE (DRV10975Z) VEN_SL Analog voltage-to-enter sleep SpdCtrlMd = 0 (analog mode) 30 mV VEX_SL Analog voltage-to-exit sleep SpdCtrlMd = 0 (analog mode) 2.2 3.3 V tEX_SL_ANA Time-to-exit from sleep mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SL 1 µs tEX_SL_DR_ANA Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SL; ISDen = 0; BrkDoneThr[2:0] = 0 350 ms tEX_SL_PWM Time-to-exit from sleep mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH 1 µs tEX_SL_DR_PWM Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0 350 ms tEN_SL_ANA Time-to-enter sleep mode SpdCtrlMd = 0 (analog mode) SPEED < VEN_SL; AvSIndEn = 0 5.2 ms tEN_SL_PWM Time-to-enter sleep mode SpdCtrlMd = 1 (PMW mode) SPEED < VDIG_IL; AvSIndEn = 0 58 ms RPD_SPEED_SL Internal SPEED pin pulldown resistance to ground VSPEED = 0 (sleep mode) 55 kΩ DIGITAL I/O (DIR INPUT AND FG OUTPUT) VDIR_H Input high 2.2 V VDIR_L Input low 0.6 V IFG_SINK Output sink current Vout = 0.3 V 5 mA I2C SERIAL INTERFACE VI2C_H Input high 2.2 V VI2C_L Input low 0.6 V LOCK DETECTION RELEASE TIME tLOCK_OFF Lock release time 5 s tLCK_ETR Lock enter time 0.3 s OVERCURRENT PROTECTION |
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