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DLPC6421 Datasheet(PDF) 8 Page - Texas Instruments |
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DLPC6421 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 48 page ![]() 8 DLPC6421 DLPS117 – JULY 2018 www.ti.com Product Folder Links: DLPC6421 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Pin Configurations and Functions (continued) PIN (1) I/O (2) DESCRIPTION NAME NO. DDB_P_9 K1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_9 K2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_8 K3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_8 K4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_7 H1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_7 H2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_6 H3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_6 H4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_5 G1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_5 G2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_4 G3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_4 G4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_3 F1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_3 F2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_2 F3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_2 F4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_1 E1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_1 E2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_0 D1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_0 D2 O7 DMD, LVDS I/F channel B, differential serial data PROGRAM MEMORY (Flash) INTERFACE PM_CSZ_0 D13 O5 N/A PM_CSZ_1 E12 O5 Boot Flash Chip Select (active low) PM_CSZ_2 A13 O5 N/A PM_ADDR_22 (GPIO 36) A12 B5 Address Bit 22 (MSB) PM_ADDR_21 (GPIO 35) E11 B5 Address Bit 21 PM_ADDR_20 D12 O5 Address Bit 20 PM_ADDR_19 C12 O5 Address Bit 19 PM_ADDR_18 B11 O5 Address Bit 18 PM_ADDR_17 A11 O5 Address Bit 17 PM_ADDR_16 D11 O5 Address Bit 16 PM_ADDR_15 C11 O5 Address Bit 15 PM_ADDR_14 E10 O5 Address Bit 14 PM_ADDR_13 D10 O5 Address Bit 13 PM_ADDR_12 C10 O5 Address Bit 12 PM_ADDR_11 B9 O5 Address Bit 11 PM_ADDR_10 A9 O5 Address Bit 10 PM_ADDR_9 E9 O5 Address Bit 9 PM_ADDR_8 D9 O5 Address Bit 8 PM_ADDR_7 C9 O5 Address Bit 7 PM_ADDR_6 B8 O5 Address Bit 6 PM_ADDR_5 A8 O5 Address Bit 5 PM_ADDR_4 D8 O5 Address Bit 4 PM_ADDR_3 C8 O5 Address Bit 3 PM_ADDR_2 B7 O5 Address Bit 2 PM_ADDR_1 A7 O5 Address Bit 1 PM_ADDR_0 C7 O5 Address Bit 0 (LSB) PM_WEZ B12 O5 Write Enable (active low) PM_OEZ C13 O5 Output Enable (active low) PM_BLSZ_1 B6 O5 N/A PM_BLSZ_0 A6 O5 N/A PM_DATA_15 C17 B5 Data Bit (15) PM_DATA_14 B16 B5 Data Bit (14) PM_DATA_13 A16 B5 Data Bit (13) PM_DATA_12 A15 B5 Data Bit (12) |
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