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AD9548 Datasheet(PDF) 103 Page - Analog Devices

Part # AD9548
Description  Quad/Octal Input Network Clock Generator/Synchronizer
PDF  111 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9548 Datasheet(HTML) 103 Page - Analog Devices

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Data Sheet
AD9548
Table 148. EEPROM Storage Sequence for Reference Input Settings
Address
Bits
Bit Name
Description
0x0E1F
[7:0]
Reference
inputs
The default value of this register is 0x07, which the controller interprets as a data instruction. Its decimal
value is 7, which tells the controller to transfer eight bytes of data (7 + 1) beginning at the address
specified by the next two bytes. The controller stores 0x07 in the EEPROM and increments the EEPROM
address pointer.
0x0E20
[7:0]
Reference
inputs
The default value of these two registers is 0x0500. Note that Register 0x0E20 and Register 0x0E21 are the
most significant and least significant bytes of the target address, respectively. Because the previous
register contains a data instruction, these two registers define a starting address (in this case, 0x0500). The
controller stores 0x0500 in the EEPROM and increments the EEPROM pointer by 2. It then transfers eight
bytes from the register map (beginning at Address 0x0500) to the EEPROM and increments the EEPROM
address pointer by nine (eight data bytes and one checksum byte). The eight bytes transferred correspond
to the reference inputs parameters in the register map.
0x0E21
[7:0]
Table 149. EEPROM Storage Sequence for Profile 0 and Profile 1 Settings
Address
Bits
Bit Name
Description
0x0E22
[7:0]
Profile 0
and
Profile 1
The default value of this register is 0x63, which the controller interprets as a data instruction. Its decimal
value is 99, which this tells the controller to transfer 100 bytes of data (99 + 1) beginning at the address
specified by the next two bytes. The controller stores 0x63 in the EEPROM and increments the EEPROM
address pointer.
0x0E23
[7:0]
Profile 0
and
Profile 1
The default value of these two registers is 0x0600. Note that Register 0x0E23 and Register 0x0E24 are the
most significant and least significant bytes of the target address, respectively. Because the previous register
contains a data instruction, these two registers define a starting address (in this case, 0x0600). The controller
stores 0x0600 in the EEPROM and increments the EEPROM pointer by 2. It then transfers 100 bytes from the
register map (beginning at Address 0x0600) to the EEPROM and increments the EEPROM address pointer by
101 (100 data bytes and one checksum byte). The 99 bytes transferred correspond to the Profile 0 and Profile
1 parameters in the register map.
0x0E24
[7:0]
Table 150. EEPROM Storage Sequence for Profile 2 and Profile 3 Settings
Address
Bits
Bit Name
Description
0x0E25
[7:0]
Profile 2
and
Profile 3
The default value of this register is 0x63, which the controller interprets as a data instruction. Its decimal
value is 99, which tells the controller to transfer 100 bytes of data (99 + 1) beginning at the address specified
by the next two bytes. The controller stores 0x63 in the EEPROM and increments the EEPROM address
pointer.
0x0E26
[7:0]
Profile 2
and
Profile 3
The default value of these two registers is 0x0680. Note that Register 0x0E26 and Register 0x0E27 are the
most significant and least significant bytes of the target address, respectively. Because the previous register
contains a data instruction, these two registers define a starting address (in this case, 0x0680). The controller
stores 0x0680 in the EEPROM and increments the EEPROM pointer by 2. It then transfers 100 bytes from the
register map (beginning at Address 0x0680) to the EEPROM and increments the EEPROM address pointer by
101 (100 data bytes and one checksum byte). The 99 bytes transferred correspond to the Profile 2 and Profile
3 parameters in the register map.
0x0E27
[7:0]
Rev. G | Page 103 of 111



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