LPC47M192 datasheet(122/228 Pages) SMSC

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SMSC DS – LPC47M192

Page 122

Rev. 03/30/05

DATASHEET

Fan Speed Control Summary

The following table illustrates the different modes for the fans.

Table 56 - Different Modes for Fan

FANx

Clock

Control

Bit

(Note 1)

FANx

Clock

Multiplier

Bit

(Note 2)

FANx

Clock

Source

Select Bit

(Note 3)

FANx

Clock

Select Bit

(Note 4)

Fout

6-Bit Duty

Cycle

Control

bits[6:1]

(DCC)

Duty Cycle

(%)

0Hz – LOW

15.625kHz

1-63

(DCC/64)

23.438kHz

x 100

40Hz

60Hz

31.25kHz

46.876kHz

80Hz

120Hz

0Hz – HIGH

Note 1:

This is FANx Register Bit 0

Note 2:

This is Fan Control Register Bit 2 or 3

Note 3:

This is Fan Control Register Bit 0 or 1

Note 4:

This is FANx Register Bit 7

FANx Registers

The FAN1 and FAN2 Registers are located at 0x56 and 0x57 from base I/O in Logical Device A. The bits are defined

below. See the register description in the “Runtime Registers” section.

Fan x Clock Select Bit, D7

The Fan x Clock select bit in the FANx registers is used with the Fan x Clock Source Select and the Fan x

Clock Multiplier bits in the Fan Control register to determine the fan speed FOUT. See Table 56 above.

Duty Cycle Control for Fan x, Bits D6 – D1

The Duty Cycle Control (DCC) bits determine the fan duty cycle. The LPC47M192 has

≈1.56% duty cycle

resolution. When DCC = “000000” (min. value), FOUT is always low. When DCC is “111111” (max. value),

FOUT is almost always high; i.e., high for 63/64

th and low for 1/64th of the FOUT period. Generally, the FOUT

duty cycle (%) is (DCC/64) x 100.

Fan x Clock Control, Bit D0

The Fan x Clock Control bit D0 is used to override the Duty Cycle Control for Fan x bits and force FOUT

always high. When D0 = “0”, the DCC bits determine the FOUT duty cycle. When D0 = 1, FOUT is always

high, regardless of the state of the DCC bits.

Fan Control Register

The Fan Control Register is located at 0x58 from base I/O in Logical Device A. The bits are defined below. See the

Fan x Count Divisor, Bits D7-D6 / D5-D4

Fan x Count Divisor bit in Fan Control Register is used to determine fan tachometer count. The choices for

the divisor are 1, 2, 4 and 8. See “Fan Tachometer Input” section.

Fan x Clock Multiplier, Bits D3 / D2

The Fan x Clock Multiplier bit is used with the Fan x Clock Source Select bit in the Fan Control Register and

the Fan x Clock Select bit in Fan register to determine the FOUT. When the Fan x Clock Multiplier bit = “0”,

no clock multiplier is used. When the Fan x Clock Multiplier bit = “1”, the clock speed determined by the Fan

x Clock Source Select bit is doubled.

Fan x Clock Source Select, Bits D1 / D0

The Fan x Clock Source Select and the Fan x Clock Multiplier bits in the Fan Control register is used with

the Fan x Clock Select bit in the Fan x registers to determine the fan speed FOUT. See Table 56 above.

7.15.2 FAN SPEED MONITORING

The LPC47M192 monitors the speed of the fans by utilizing fan tachometer input signals from fans equipped with

tachometer outputs. There are two pins that can be configured as the fan tachometer inputs (pins 51 and 52) which

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