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LPC47M192 Datasheet(PDF) 127 Page - SMSC Corporation

Part # LPC47M192
Description  LPC SUPER I/O WITH HARDWARE MONITORING BLOCK
PDF  228 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LPC47M192 Datasheet(HTML) 127 Page - SMSC Corporation

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SMSC DS – LPC47M192
Page 127
Rev. 03/30/05
DATASHEET
JOYW
OUTA,B
JOYR
VREF
TIMA,B
2
3
VREF
t1
The game port register is defined below. It is a runtime register located at the address programmed into the base I/O
address (GAME_PORT) in Logical Device 9.
Note:
Register 0x60 is the high byte; 0x61 is the low byte. For example, to set the primary base address to 1234h,
write 12h into 0x60, and 34h into 0x61.
When the activate bit in Logical Device 9 is cleared, it prevents the base I/O address for the game port from being
decoded.



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