LPC47M192 datasheet(175/228 Pages) SMSC

175 / 228 page

SMSC DS – LPC47M192

Page 175

Rev. 03/30/05

DATASHEET

Table 67 – I/O Base Address Configuration Register Description

LOGICAL

DEVICE

NUMBER

LOGICAL

DEVICE

INDEX

BASE I/O

RANGE

(Note 1)

FIXED

BASE OFFSETS

0x00

FDC

0x60,0x61

[0x0100:0x0FF8]

ON 8 BYTE

BOUNDARIES

+0 : SRA

+1 : SRB

+2 : DOR

+3 : TDR

+4 : MSR/DSR

+5 : FIFO

+7 : DIR/CCR

0x01

Reserved

n/a

0x02

Reserved

n/a

[0x0100:0x0FFC]

ON 4 BYTE

BOUNDARIES

(EPP Not supported)

[0x0100:0x0FF8]

ON 8 BYTE

BOUNDARIES

+0 : Data/ecpAfifo

+1 : Status

+2 : Control

+400h : cfifo/ecpDfifo/tfifo/cnfgA

+401h : cnfgB

+402h : ecr

0x03

Parallel

Port

0x60,0x61

(all modes supported,

EPP is only available

when the base address

is on an 8-byte

boundary)

+3 : EPP Address

+4 : EPP Data 0

+5 : EPP Data 1

+6 : EPP Data 2

+7 : EPP Data 3

0x04

Serial Port 1

0x60,0x61

[0x0100:0x0FF8]

ON 8 BYTE

BOUNDARIES

+0 : RB/TB/LSB div

+1 : IER/MSB div

+2 : IIR/FCR

+3 : LCR

+4 : MSR

+5 : LSR

+6 : MSR

+7 : SCR

0x05

Serial Port 2

0x60,0x61

[0x0100:0x0FF8]

ON 8 BYTE

BOUNDARIES

+0 : RB/TB/LSB div

+1 : IER/MSB div

+2 : IIR/FCR

+3 : LCR

+4 : MSR

+5 : LSR

+6 : MSR

+7 : SCR

0x06

Reserved

n/a

0x07

KYBD

n/a

Not Relocatable

Fixed Base Address:

60,64

+0 : Data Register

+4 : Command/Status Reg.

0x08

Reserved

n/a

0x09

Game Port

0x60,0x61

[0x0100:0x0FFF]

on 1 byte boundaries

+00: Game Port Register

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