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LPC47M192 Datasheet(PDF) 182 Page - SMSC Corporation |
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LPC47M192 Datasheet(HTML) 182 Page - SMSC Corporation |
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182 / 228 page  SMSC DS – LPC47M192 Page 182 Rev. 03/30/05 DATASHEET NAME REG INDEX DEFINITION Bits[6:5] reset on VTR POR only 1=block mouse clock and data signals into 8042 0= do not block mouse clock and data signals into 8042 Bit[5] K_ISO. Enables/disables isolation of keyboard signals into 8042. Does not affect KDAT signal to keyboard wakeup (PME) logic. 1=block keyboard clock and data signals into 8042 0= do not block keyboard clock and data signals into 8042 Bit[4] MLATCH = 0 MINT is the 8042 MINT ANDed with Latched MINT (default) = 1 MINT is the latched 8042 MINT Bit[3] KLATCH = 0 KINT is the 8042 KINT ANDed with Latched KINT (default) = 1 KINT is the latched 8042 KINT Bit[2] Port 92 Select = 0 Port 92 Disabled = 1 Port 92 Enabled Bit[1] Reserved Bit[0] Reserved |
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