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LPC47M192 Datasheet(PDF) 186 Page - SMSC Corporation |
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LPC47M192 Datasheet(HTML) 186 Page - SMSC Corporation |
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186 / 228 page ![]() SMSC DS – LPC47M192 Page 186 Rev. 03/30/05 DATASHEET 10.3.1.1 Registers 3Eh-4Fh NAME/DEFAULT REGISTER OFFSET (hex) DESCRIPTION Company ID Default=0x55 on HVCC POR and Initialization 3E (R) Bits[7:0] This location contains the identification number which will be used by software to determine analog voltage curves. Stepping Number and Version Default=0x20 on HVCC POR and Initialization 3F (R) Bits[7:0] This location contains the stepping number of the part in the lower four bits of the register [3:0]. The upper four bits reflect the Version Number [7:4]. The Hardware Monitor Block has a version number (Bits[7:4]) of 0010. For the A0 stepping of Hardware Monitor Block, this register will read 0010 0000. Configuration Default = 0x08 on HVCC POR and Initialization 40 (R/WC) Bit[4] is self-clearing Bit[0] Start Logic 1 enables startup of monitor block, logic 0 places the block in the low power mode selected by bit 0 of the Special Function register at 4Fh. At startup, limit checking functions and scanning begins. Note, all HIGH and LOW LIMITS should be set into the ASIC prior to turning on this bit. Bits[3:1] Reserved Bit[4] Reset Setting this bit generates a minimum 20 ms low pulse on the Reset pin, if the function is enabled. (See VID Register). This bit is self-clearing. Bit[5] +12/VID4 Select Selects whether pin 10 acts as a 12 Volt Analog Input monitoring pin, or as a VID[4] input. This pin defaults to the 12 Volt Analog Input. Bit[6] Reserved Bit[7] Initialization Logic 1 restores powerup default values to the Configuration Register and Interrupt status registers. This bit automatically clears itself since the power on default is zero. |
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