AD9152 datasheet(62/103 Pages) AD

62 / 103 page

AD9152

Data Sheet

Rev. B | Page 62 of 103

To run the datapath PRBS test, complete the following steps:

Set up the device in the desired operating mode. See the

Device Setup Guide section for details on setting up the

device.

Send the PRBS7 or PRBS15 data.

Write 0 to Register 0x14B, Bit 2 for PRBS7 or write 1 for

PRBS15.

Write 0b11 to Register 0x14B, Bits[1:0] to enable and reset

the PRBS test.

Write 0b01 to Register 0x14B, Bits[1:0] to enable the PRBS

test and release reset.

Wait 500 ms.

Check the status by checking the IRQ for the I DAC and

the Q DAC PRBS as described in the Datapath PRBS IRQ

section.

Read Register 0x14B, Bits[7:6]. Bit 6 is 0 if the I DAC of the

selected dual has any errors. Bit 7 is 0 if the Q DAC of the

selected dual has any errors. This must match the IRQ.

Read Register 0x14C to read the error count for the I DAC.

Read Register 0x14D to read the error count for the Q DAC.

Note that the PRBS processes 32 bits at a time, and compares

the 32 new bits to the previous set of 32 bits. It detects (and

reports) only 1 error in every group of 32 bits; therefore, the

error count partly depends on when the errors are seen.

For example,

•

Bits: 32 good, 31 good, 1 bad; 32 good (2 errors)

•

Bits: 32 good, 22 good, 10 bad; 32 good (2 errors)

•

Bits: 32 good, 31 good, 1 bad; 31 good, 1 bad; 32 good

(3 errors)

Datapath PRBS IRQ

The PRBS fail signals for each DAC are available as IRQ events.

Use Register 0x020, Bits[1:0] to enable the fail signals, and then

use Register 0x02s[1:0] to read back their statuses and reset the

IRQ signals. See the Interrupt Request Operation section for

more information.

DC TEST MODE

As a convenience, the AD9152 provides a dc test mode, which is

enabled by setting Register 0x0F7, Bit 1. When this mode is

enabled, the datapath is given 0 (midscale) for its data.

In conjunction with dc offset, this test mode can provide

desired dc data to the DACs. This test mode can also provide

sinusoidal data to the DACs by combining digital modulation

(to set frequency) and dc offset (to set amplitude). See the DC

Offset section.

AD9152 Datasheet(PDF) 62 Page - Analog Devices

AD9152 Datasheet(HTML) 62 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL