AD9152 datasheet(19/103 Pages) AD

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Data Sheet

AD9152

Rev. B | Page 19 of 103

200

400

600

800

1000

fDAC (MHz)

1200

1400

1600

1800

2000

1/4 COARSE MODULATION

1/8 COARSE MODULATION

NCO

PFIR

DIGITAL GAIN

INVSINC

1.2V

1.3V

Figure 28. DVDD12 Supply Delta Current vs. fDAC over Digital Functions

fDAC (MHz)

200

400

600

800

1000

1200

1400

1600

1800

2000

100

200

150

250

300

AVDD33

CVDD12

PVDD12

PLL OFF, 1.2V

PLL OFF, 1.3V

PLL ON, 1.2V

PLL ON, 1.3V

Figure 29. AVDD33, CVDD12, PVDD12 Supply Current vs. fDAC

LANE RATE (Gbps)

100

400

150

200

250

300

350

450

500

1 LANE

2 LANES

4 LANES

1.2V

1.3V

Figure 30. Total SERDES Supply Current (SVDD12, SDVDD12, PLLVDD12) vs.

Lane Rate; One, Two, and Four Lanes

OFFSET FREQUENCY (Hz)

–80

–100

–120

–140

–160

–180

–200

100

10k

100k

10M

100M

fOUT = 51MHz

fOUT = 101MHz

fOUT = 201MHz

fOUT = 401MHz

51MHz SMA100A INPUT SIGNAL

PLL OFF

PLL ON

Figure 31. Single Tone Phase Noise vs. Offset Frequency at Four fOUT Values

and with an SMA100A Signal Generator, fDAC = 1.96608 GHz, PLL On and Off

AD9152 Datasheet(PDF) 19 Page - Analog Devices

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