SYNPWM datasheet(38/57 Pages) FEELING

38 / 57 page

FM8P73B

Web site: http://www.feeling-tech.com.tw

Rev1.0 Nov 20, 2013

P.38/FM8P73B

FEELING

TECHNOLOGY

ADDAR

Add ACC and R

Syntax:

ADDAR R, d

Operands:

 R  0x6F

 [0,1]

Operation:

ACC + R  dest

Status Affected:

C, DC, Z

Description:

Add the contents of the ACC register and register ‘R’. If ‘d’ is 0 the result is stored in the

ACC register. If ‘d’ is ‘1’ the result is stored back in register ‘R’.

Cycles:

ANDAR

AND ACC and R

Syntax:

ANDAR R, d

Operands:

 R  0x6F

 [0,1]

Operation:

ACC and R  dest

Status Affected:

Description:

The contents of the ACC register are AND’ed with register ‘R’. If ‘d’ is 0 the result is stored

in the ACC register. If ‘d’ is ‘1’ the result is stored back in register ‘R’.

Cycles:

ANDIA

AND Immediate with ACC

Syntax:

ANDIA I

Operands:

 I  0xFF

Operation:

ACC AND I  ACC

Status Affected:

Description:

The contents of the ACC register are AND’ed with the 8-bit immediate ‘I’. The result is

placed in the ACC register.

Cycles:

BCR

Clear Bit in R

Syntax:

BCR R, b

Operands:

 R  0x6F

 b  7

Operation:

0  R<b>

Status Affected:

None

Description:

Clear bit ‘b’ in register ‘R’.

Cycles:

BSR

Set Bit in R

Syntax:

BSR R, b

Operands:

 R  0x6F

 b  7

Operation:

1  R<b>

Status Affected:

None

Description:

Set bit ‘b’ in register ‘R’.

Cycles:

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