SYNPWM datasheet(27/57 Pages) FEELING

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FM8P73B

Web site: http://www.feeling-tech.com.tw

Rev1.0 Nov 20, 2013

P.27/FM8P73B

FEELING

TECHNOLOGY

2.5

Watch Dog Timer (WDT)

The Watchdog Timer (WDT) is a free running on-chip RC oscillator which does not require any external

components. So the WDT will still run even if the clock on the OSCI and OSCO pins is turned off, such as in

SLEEP mode.

The WDT has a typical time-out period of 20 ms (without prescaler). This period of this timer may be variant

slightly because of temperature, voltage, and process variation. If a longer time-out period is desired, a prescaler

with a division ratio of up to 1:128 can be assigned to the WDT controlled by the WDTCON register <2:0>. Thus,

the longest time-out period is approximately 2.56 seconds.

The CLRWDT instruction clears the WDT and prevents it from timing out and generating a device reset.

The SLEEP instruction also resets the WDT. This gives the maximum SLEEP time before a WDT Wake-up

Reset.

There are two type of watchdog timer mode could be selected by I_WDT (WDTCON <6>). When I_WDT bit

disable, normal watchdog timer reset is selected. During normal operation or in SLEEP mode, a WDT time-out

will cause the device reset and the TO

̅̅̅̅ bit (STATUS<4>) will be cleared.

If I_WDT bit enabled, the internal watchdog timer wakeup will be used. The system wakeups from sleep, then

jumps into interrupt vector with external interrupt request PBIF (INTFLAG<5>) and continues from next instruction

instead of triggering a reset event. There is a stabilization time required for internal watchdog wakeup could be

selected by I_ TWDT (WDTCON<5>). The default value of this stabilization timer is 2.5ms.

Example 2.4: Internal Watchdog Wakeup

Address

Code

#include

<8P73B.ASH>

…

MOVIA

0xA0

n+1

MOVAR

INTEN

;Enable global & Port B interrupt

n+2

CLRWDT

n+3

MOVIA

0x67

n+4

MOVAR

WDTCON

;Sleep: 2.56S + Wakeup:1.25mS

n+5

…

n+6

…

n+7

SLEEP

n+8

NOP

…

N/A

ISR:

;In this example, ISR define at 0x200

200

…

;User WDT Wakeup ISR code

200+n

MOVIA

0xDF

200+n+1

MOVAR

INTFLAG

;Clear PBIF flag(Note1)

200+n+2

RETFIE

0x3FE

GOTO

ISR

0x3FF

GOTO

START

Note : 1. BCR instruction is not recommended for Clear interrupt flag (INTFLAG register).

2. Interrupt save status code is not shown in this example.

1. WDT Wakeup

2. Return from ISR

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