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SYNPWM Datasheet(PDF) 6 Page - Feeling Technology Corp. |
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SYNPWM Datasheet(HTML) 6 Page - Feeling Technology Corp. |
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6 / 57 page  FM8P73B Web site: http://www.feeling-tech.com.tw Rev1.0 Nov 20, 2013 P.6/FM8P73B FEELING TECHNOLOGY 1.2 Data Memory Organization Data memory is composed of 27 bytes Special Function Registers and 64 bytes General Purpose Registers. The data memory can be accessed either directly or indirectly through the FSR register. Table 1.1: Registers File Map for FM8P73B Address Description 00h : Special Purpose : Register 24h 30h : General Purpose : Register 6Fh Table 1.2: Special Purpose Registers Map Address Name B7 B6 B5 B4 B3 B2 B1 B0 System 00h (r/w) INDF Uses contents of FSR to address data memory (not a physical register) 02h (r/w) PCL Low order 8 bits of PC 03h (r/w) STATUS - - PS TO ̅̅̅̅ PD ̅̅̅̅ Z DC C 04h (r/w) FSR 0 Indirect data memory address pointer IO PAD & CONTROL 05h (r/w) IOSTA - - IOSTA5 IOSTA4 IOSTA3 IOSTA2 IOSTA1 IOSTA0 06h (r/w) PORTA - - IOA5 IOA4 IOA3 IOA2 IOA1 IOA0 07h (r/w) IOSTB IOSTB7 IOSTB6 IOSTB5 IOSTB4 - IOSTB2 IOSTB1 IOSTB0 08h (r/w) PORTB IOB7 IOB6 IOB5 IOB4 IOB3 IOB2 IOB1 IOB0 Timer1: 8-bit Timer & PWM1 Period 0Bh (r/w) T1CON T1EN T1LOAD T1SO1 T1SO0 T1EDG T1PS2 T1PS1 T1PS0 0Ch (r/w) PWM1CON T12MOD PWMS POPS - PIR13 PIR12 PIR11 PIR10 0Dh (r/w) T1LA 8-bit real-time timer Latch 14h (r/w) SYNPWM SYNEN PINV DISN - - - DELS1 DELS0 Timer2: 8-bit Timer & PWM1 Duty 0Fh (r/w) T2CON T2EN T2LOAD T2SO1 T2SO0 T2EDG T2PS2 T2PS1 T2PS0 10h (r/w) T2LA 8-bit real-time timer Latch Timer3: 8-bit Timer 22h (r/w) T3CON T3EN T3LOAD T3SO1 T3SO0 T3EDG T3PS2 T3PS1 T3PS0 24h (r/w) T3LA 8-bit real-time timer Latch IRQ 15h (r/w) INTEN GIE ADCIE PBIE - - T3IE T2IE T1P1IE 16h (r/w) INTFLAG - ADCIF PBIF - - T3IF T2IF T1P1IF ADC Control 17h (r/w) ADCON1 ADCEN - - - CHSL3 CHSL2 CHSL1 CHSL0 18h (r/w) ADCON2 - - - - - - CLKSL1 CLKSL0 19h (r/w) ADCON3 - - - - ANISL3 ANISL2 ANISL1 ANISL0 1Ah (r) ADDATL D1 D0 - - - - - - 1Bh (r) ADDATH D9 D8 D7 D6 D5 D4 D3 D2 |
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