SYNPWM datasheet(43/57 Pages) FEELING

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FM8P73B

Web site: http://www.feeling-tech.com.tw

Rev1.0 Nov 20, 2013

P.43/FM8P73B

FEELING

TECHNOLOGY

RETURN

Return from Subroutine

Syntax:

RETURN

Operands:

None

Operation:

Top of Stack  PC

Status Affected:

None

Description:

The program counter is loaded from the top of the stack (the return address). This is a two-

cycle instruction.

Cycles:

RLR

Rotate Left R through Carry

Syntax:

RLR R, d

Operands:

 R  0x6F

 [0,1]

Operation:

R<7>  C;

R<6:0>  dest<7:1>;

C  dest<0>

Status Affected:

Description:

The contents of register ‘R’ are rotated left one bit to the left through the Carry Flag. If ‘d’ is

0 the result is placed in the ACC register. If ‘d’ is 1 the result is stored back in register ‘R’.

Cycles:

RRR

Rotate Right R through Carry

Syntax:

RRR R, d

Operands:

 R  0x6F

[0,1]

Operation:

C  dest<7>;

R<7:1>  dest<6:0>;

R<0>  C

Status Affected:

Description:

The contents of register ‘R’ are rotated one bit to the right through the Carry Flag. If ‘d’ is 0

the result is placed in the ACC register. If ‘d’ is 1 the result is placed back in register ‘R’.

Cycles:

SLEEP

Enter SLEEP Mode

Syntax:

SLEEP

Operands:

None

Operation:

00h  WDT;

1  TO

̅̅̅̅;

0  PD

̅̅̅̅

Status Affected:

̅̅̅̅, PD

̅̅̅̅

Description:

Time-out status bit (TO

̅̅̅̅) is set. The power-down status bit (PD

̅̅̅̅) is cleared. The WDT is

cleared.

The processor is put into SLEEP mode.

Cycles:

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