D17133CS datasheet(191/289 Pages) NEC

191 / 289 page

CHAPTER 16

RESET

176

16.3.3 Condition Required for Use of the Power-Down Reset Function

The power-down reset function can be enabled or disabled using software. The following conditions are required

to use this function:

• The power voltage must be 4.5 to 5.5 V during normal operation, including the standby state.

• The frequency of the system clock oscillator must be 400 kHz to 4 MHz.Note

Note

µPD17121/17133/17P133 only

Caution When the microcontroller is used with a power voltage of 2.7 to 4.5 V, add an external reset circuit

instead of using the internal power-down reset circuit. If the internal power-down reset circuit

is used with a power voltage of 2.7 to 4.5 V, reset operation may not terminate.

16.3.4 Description and Operation of the Power-Down Reset Function

This function is enabled by setting the power-down reset enable flag (PDRESEN) using software.

When this function detects a power voltage drop, it issues the reset signal to the microcontroller. It then initializes

the microcontroller.

Stopping oscillation during reset prevents the power voltage in the microcontroller from

fluctuating out of control. When the specified power voltage recovers and the power-down reset operation is

terminated, the microcontroller waits the time required for stable oscillation using the timer. The microcontroller

then enters normal operation (starts from the top of memory).

Figure 16-4 shows an example of the power-down operation. Figure 16-5 shows an example of reset operation

during the period from power-down reset to power recovery.

Operation of the power-down reset circuit

<1> This circuit always monitors the voltage applied to the VDD pin.

<2> When this circuit detects a power voltage drop, it issues a reset signal to the other parts of the microcontroller.

It continues to send this reset signal until the power voltage recovers or all the functions in the microcontroller

stop.

<3> This circuit stops oscillation during the reset operation to prevent software crashes.

When the power voltage recovers to the low-voltage detection level (typically 3.5 V, 4.5 V maximum) before

the power-down reset function stops, the microcontroller waits the time required for stable oscillation using

timer, then enters normal operation mode.

<4> When the power voltage recovers from 0 V, the power-on reset function has priority.

<5> After the power-down reset function stops and the power voltage recovers before it reaches 0 V, the

microcontroller waits using timer until oscillation becomes stable and the power voltage (VDD) reaches

2.7 V. The microcontroller then enters normal operation mode.

D17133CS Datasheet(PDF) 191 Page - NEC