D17133CS datasheet(207/289 Pages) NEC

207 / 289 page

CHAPTER 18

INSTRUCTION SET

192

MOV

BANK, #00H

MOV

RPH, #00H

; General register bank 0

MOV

RPL, #00H

; General register row address 0

MOV

IXH, #00H

; IX

← 00000010000B (0.10H)Note

MOV

IXM, #01H

MOV

IXL, #00H

SET1

IXE

; IXE flag

← 1

ADD

MEM003, MEM02F ; IX

00000010000B (0.10H)

; Bank operand OR) 00000101111B (0.2FH)

; Specified address 00100111111B (0.3FH)

IX (index register) is assigned in the system register, as shown above.

Therefore, to specify IX=0.10H, 00H must be stored in IXH. 01H in IXM, and 00H in IXL.

In this case, MP (memory pointer) for general register indirect transfer is invalid, because the MPE flag

(memory pointer enable) is reset.

<4> Note

The first operand for the ADD r, m instruction is a column address in general register. Therefore, if the

instruction is described as follows, the column address for the general register is 03H.

MEM013

MEM

0.13H

MEM02F

MEM

0.2FH

ADD

MEM013, MEM02F

Indicates the general register column address.

The lower 4 bits (in this case, 03H) are valid

When CMP flag=1, the addition result is not stored.

When BCD flag=1, the BCD result is stored.

IXH

IXM

Bit

Data

Note

Bank

Row

Address

IXL

Column

address

D17133CS Datasheet(PDF) 207 Page - NEC

D17133CS Datasheet(HTML) 207 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL