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Advanced 10/100 Unmanaged Repeater — LXT9883/9863

Datasheet

Document #: 249115

Revision #: 003

Rev. Date: 08/07/01

Table 3.

Inter-Repeater Backplane Signal Descriptions

Symbol

Type

1, 2

Description

Common IRB Signals

COMP_SEL

Compatibility Mode Select. 3.3V on this pin causes the IRCFSBP signals to operate in

3.3V only mode. 5V on this pin causes the IR100CFSBP or IR10CFSBP signals to

operate in 5V backwards compatibility mode with LXT98x devices.

100 Mbps IRB Signals

IR100CFS

A I/O

100 Mbps IRB Collision Force Sense. A three-level signal that determines number of

active ports on the “logical” repeater. High level (3.3V) indicates no ports active; Mid

level (approx. 1.6V) indicates one port active; Low level (0V) indicates more than one

port active, resulting in a collision. This signal requires a 215

Ω pull-up resistor, and

connects between ICs on the same board.

IR100CFSBP

A I/O

100 Mbps IRB Collision Force Sense - Backplane. This three-level signal functions

the same as IR100CFS; however, it connects between ICs with FPS = 0, on different

boards. IR100CFSBP requires a single 91

Ω pull-up resistor in each stack. This signal

can be set in either 5V or 3.3V modes by the COMP_SEL pin.

IR100SNGL

I/O

Schmitt PU

100 Mbps Single Driver State. This active Low signal is asserted by the device with

FPS = 0 when a packet is received from one or more ports. Do not connect this signal

between boards.

IR100COL

I/O

Schmitt PU

100 Mbps Multiple Driver State. This active Low signal is asserted by the device with

FPS = 0 when a packet is being received from more than one port (collision). Do not

connect this signal between boards.

IR100DEN

100 Mbps IRB Driver Enable. This output provides directional control for an external

bidirectional transceiver (74LVT245) used to buffer the 100 Mbps IRB in multi-board

applications. It must be pulled up by a 330

Ω resistor. When there are multiple devices

on one board, tie all IR100DEN outputs together. If IR100DEN is tied directly to the DIR

pin on a 74LVT245, attach the on-board IR100DAT, IR100CLK, and IR100DV signals to

the “B” side of the 74LVT245, and connect the off-board signals to the “A” side of the

74LVT245.

IR100DV

I/O

Schmitt

100 Mbps IRB Data Valid. This active Low signal indicates port activity on the

repeater. IR100DV frames the clock and data of the packet on the backplane. This

signal requires a 300

Ω pull-up resistor.

IR100DAT0

IR100DAT1

IR100DAT2

IR100DAT3

IR100DAT4

I/O

Tri-state

Schmitt

100 Mbps IRB Data. These bidirectional signals carry 5-bit data on the 100 Mbps IRB.

Data is driven on the falling edge and sampled on the rising edge of IR100CLK. Buffer

these signals between boards.

IR100CLK

I/O

Tri-state

Schmitt

100 Mbps IRB Clock. This bidirectional, non-continuous, 25 MHz clock is recovered

from received network traffic. Schmitt triggering is used to increase noise immunity. This

signal must be pulled to VCC when idle. One 1 k

Ω pull-up resistor on both sides of a

74LVT245 buffer is recommended.

1. I = Input, O = Output, I/O = Input/Output, D = Digital, AI = Analog Input, A I/O = Analog Input/Output, OD = Open Drain,

OS = Open Source, PD = Pull Down, PU = Pull Up. Even if the IRB is not used, required pull-up resistors must be installed as

listed above.

NC = No Clamp. Pad does not clamp input in the absence of power.

2. Pins are 5V tolerant, unless indicated.

3. IR100CFS is not 5V tolerant.

4. IR10CFS is not 5V tolerant.

9883 Datasheet(PDF) 11 Page - Intel Corporation

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