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RX113 Datasheet(PDF) 122 Page - Renesas Technology Corp

Part # RX113
Description  32 MHz maximum operating frequency Capable of 50 DMIPS when operating at 32 MHz
PDF  131 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RX113 Datasheet(HTML) 122 Page - Renesas Technology Corp

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R01DS0216EJ0120 Rev.1.20
Page 122 of 131
Sep 07, 2020
RX113 Group
5. Electrical Characteristics
5.14
E2 DataFlash Characteristics
Note 1. The reprogram/erase cycle is the number of erasing for each block. When the reprogram/erase cycle is n times (n = 100000),
erasing can be performed n times for each block. For instance, when 1-byte programming is performed 1000 times for different
addresses in 1-Kbyte block and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasing is not enabled (overwriting is prohibited).
Note 2. Characteristic when using the flash memory programmer and the self-programming library provided from Renesas Electronics.
Note 3. These results are obtained from reliability testing.
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note:
The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note:
The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note:
The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note:
The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Table 5.63
E2 DataFlash Characteristics (1)
Item
Symbol
Min.
Typ.
Max.
Unit
Conditions
Reprogramming/erasure cycle*1
NDPEC
100000
1000000
—
Times
Data hold time
After 10000 times of NDPEC
tDDRP
20*2, *3
—
—
Year
Ta = +85°C
After 100000 times of NDPEC
5*2, *3
—
—
Year
After 1000000 times of NDPEC
—1*2, *3
—
Year
Ta = +25°C
Table 5.64
E2 DataFlash Characteristics (2)
: high-speed operating mode
Conditions: 2.7 V
≤ VCC ≤ 3.6 V, 2.7 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: Ta = –40 to +105°C
Item
Symbol
FCLK = 1 MHz
FCLK = 32 MHz
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Programming time
1-byte
tDP1
—
86
761
—
40.5
374
µs
Erasure time
1-Kbyte
tDE1K
—
17.4
456
—
6.15
228
ms
8-Kbyte
tDE8K
—
60.4
499
—
9.3
231
ms
Blank check time
1-byte
tDBC1
—
—
48
—
—
15.9
µs
1-Kbyte
tDBC1K
—
—
1.58
—
—
0.127
ms
Erase operation forcible stop time
tDSED
—
—
21.5
—
—
12.8
µs
DataFlash STOP recovery time
tDSTOP
5—
—5—
—
µs
Table 5.65
E2 DataFlash Characteristics (3)
: middle-speed operating mode
Conditions: 1.8 V
≤ VCC ≤ 3.6 V, 1.8 V ≤ AVCC0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: Ta = –40 to +85°C
Item
Symbol
FCLK = 1 MHz
FCLK = 8 MHz
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Programming time
1-byte
tDP1
—
126
1160
—
85.4
818
µs
Erasure time
1-Kbyte
tDE1K
—
17.5
457
—
7.76
259
ms
8-Kbyte
tDE8K
—
60.5
500
—
16.7
267.6
ms
Blank check time
1-byte
tDBC1
——
78
——
50
µs
1-Kbyte
tDBC1K
—
—
1.61
—
—
0.369
ms
Erase operation forcible stop time
tDSED
—
—
33.5
—
—
25.5
µs
DataFlash STOP recovery time
tDSTOP
720
—
—
720
—
—
ns



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