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UPD16488AP Datasheet(PDF) 45 Page - NEC |
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UPD16488AP Datasheet(HTML) 45 Page - NEC |
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45 / 91 page ![]() Data Sheet S15745EJ2V0DS 45 µµµµPD16488A 5.7.3 Line shift driver If the frame rate control is performed with equal pulse widths and the same gray scale is displayed on the LCD's full screen, problems such as flickering may occur on the LCD panel. The µPD16488A provides a line shift driver as a countermeasure against such screen image problems. Using 8 frames per cycle, the segment PWM output timing is shifted among the common outputs, as shown in Table 5-16 below. Table 5-16. Line Shift Driver Turn 1 Turn 2 Frame 1 2345 6781 2345 6781 234 COM1 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 COM2 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 COM3 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 COM4 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 COM5 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 COM6 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 COM7 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 COM8 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 COM9 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 COM10 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 F1 F2 F3 F4 F5 F6 F7 F8 • • •••• •••• •••• •••• ••• Remark Fx: Pulse width modulated output frame (See 5.7.2 Full-dot frame rate control). Figure 5-22. Full Dot Frame Rate Control 1234 5 1 2 15 3 1 7 3 7 5 6 2 8 15 3 1 7 3 7 5 6 2 8 15 3 1 7 3 7 5 6 2 8 15 3 1 7 3 7 5 6 2 8 15 3 1 7 3 7 5 6 2 8 ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF SEG1 SEG2 SEG3 SEG4 SEG5 COM1 COM2 COM3 COM4 COM5 COM91 COM92 First frame Second frame 91 92 Remark Numerical values in the segment data correspond to the gray-scale palette's frame numbers. |
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