UPD16488AP datasheet(62/91 Pages) NEC

62 / 91 page

Data Sheet S15745EJ2V0DS

µµµµPD16488A

6.13 Display Start Line Setting Register (R12)

Display start line set specifies the top line in the display.

−

DSL6

DSL5

DSL4

DSL3

DSL2

DSL1

DSL0

Default settings (initial values set by reset command)

−

0000000

6.14 Blink X Address Register (R13)

The blink X address register specifies the X address of the blink data RAM accessed by the CPU. This address is

automatically incremented each time the blink data RAM is accessed.

−−−−

BXA3

BXA2

BXA1

BXA0

Default settings (initial values set by reset command)

−−−−

0000

6.15 Blink Start Line Address Register (R14)

The blink start line address register specifies the start line address of the display RAM accessed when the CPU uses blink

display mode. The range of blinking lines is determined based on the contents of this register and the blink end line

address register.

Setting

−

BSL6

BSL5

BSL4

BSL3

BSL2

BSL1

BSL0

−

Default settings (initial values set by reset command)

−

0000000

6.16 Blink End Line Address Register (R15)

The blink end line address register specifies the end line address of the display RAM accessed when the CPU uses blink

display mode. The range of blinking lines is determined based on the contents of this register and the blink start line

address register.

Setting

−

BEL6

BEL5

BEL4

BEL3

BEL2

BEL1

BEL0

−

Default settings (initial values set by reset command)

−

0000000

UPD16488AP Datasheet(PDF) 62 Page - NEC

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