UPD16488AP datasheet(73/91 Pages) NEC

73 / 91 page

Data Sheet S15745EJ2V0DS

µµµµPD16488A

8.2 Power OFF Sequence (When Using On-Chip Power Supply)

Operation mode

↓

DISP = 0, HALT = 0

Display OFF, internal operation start mode

↓

HPM1 = 1, HPM0 = 0

R32

Sets high power mode

↓

Set electronic volume register

R35

[EV7, EV6, EV5, EV4, EV3, EV2, EV1, EV0]

= [0, 0, 0, 0, 0, 0, 0, 0]

↓

Set partial electronic volume register

R36

[PEV7, PEV6, PEV5, PEV4, PEV3, PEV2, PEV1, PEV0]

= [0, 0, 0, 0, 0, 0, 0, 0]

↓

Wait at least 1200 ms before power OFF Note.

Power supply OFF

Note

This 1200 ms wait time varies according to the panel characteristics and the capacitance value of the

boost/smoothing capacitor. NEC recommends determining the wait time after making a thorough evaluation of the

actual device (refer to 8.5 VOUT, VLCD Voltage Sequence (power ON

→

→ power OFF)).

8.3 Power ON Sequence (When Using External Driver Power Supply, Power ON

→

→ Display ON)

Logic power ON when /RES pin = L

VDD1, VDD2 power ON, VOUT = Hi-Z

↓

Power supply stabilization

↓

/RES pin = H

↓

Wait at least 50

µs befor command input

Command reset

↓

DISP = 0, HALT = 1

Display OFF, internal operations stopped

↓

Initialization via command input (user-specified)

Selection of IC functions, etc.

Power system control register 1 (R32) :

[OP2, OP1, OP0] = [0 ,0 ,X]

↓

DISP = 0, HALT = 0

Display OFF, internal operations started

↓

External LCD driver power supply ON

VOUT power supply ON

↓

Stabilization of external LCD driver power supply

↓

DISP = 1, HALT = 0

Display ON, internal operations started

UPD16488AP Datasheet(PDF) 73 Page - NEC

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