AX88141

PRELIMINARY

ASIX ELECTRONICS CORPORATION

2

CONFIDENTIAL

CONTENTS

1.0 INTRODUCTION .......................................................................................................................................... 6

2.0 SIGNAL DESCRIPTION............................................................................................................................. 10

3.0 CONFIGURATION OPERATION ............................................................................................................. 14

3.2.1 Configuration ID Register (CSID)....................................................................................................... 15

3.2.2 Command and Status Configuration Register (CSCS)........................................................................... 15

3.2.3 Configuration Revision Register (CSRV)............................................................................................. 15

3.2.4 Configuration Latency Timer Register (CSLT) .................................................................................... 15

3.2.5 Configuration Base I/O Address Register (CBIO) ............................................................................... 16

3.2.6 Configuration Base Memory Address Register (CBMA) ...................................................................... 16

3.2.7 Expansion ROM Base Address Register (CBER) ................................................................................. 16

3.2.8 Configuration Interrupt Register (CSIT).............................................................................................. 16

3.2.9 Special Use Register (SUD) ................................................................................................................ 16

3.2.10 Subsystem ID and Subsystem Vendor Register (SSID) ....................................................................... 16

3.2.11 New Capabilities Pointer (CNCP) ..................................................................................................... 17

3.2.12 Power Management register block (Offset 44H to 49H)...................................................................... 17

4.0 REGISTERS OPERATION......................................................................................................................... 18

4.2.1 Bus Mode Register (REG0) .................................................................................................................. 19

4.2.2 Magic Packet Password Low (REG0B)................................................................................................ 19

4.2.3 Transmit Poll Demand (REG1) ........................................................................................................... 19

4.2.4 Magic Packet Password High (REG1B) .............................................................................................. 19

4.2.5 Receive Poll Demand (REG2) ............................................................................................................. 20

4.2.6 Receive List Base Address (REG3)...................................................................................................... 20

4.2.7 Transmit List Base Address (REG4) .................................................................................................... 20

4.2.8 Status Register (REG5) ....................................................................................................................... 21

4.2.9 Operation Mode Register (REG6) ....................................................................................................... 22

4.2.10 Interrupt Enable Register (REG7) ..................................................................................................... 24

4.2.11 Missed Frame and Overflow Counter (REG8) .................................................................................. 24

4.2.12 Serial ROM and MII Management Register (REG9).......................................................................... 25

4.2.13 General -Purpose Timer (REG11) ..................................................................................................... 25

4.2.14 General -Purpose Port Register (REG12).......................................................................................... 26

4.2.15 Filtering Index (REG13) ................................................................................................................... 26

4.2.16 Filtering data (REG14) ..................................................................................................................... 26

5.0 HOST COMMUNICATION........................................................................................................................ 28

5.2.1 Receive Descriptor 0 (RDES0) ............................................................................................................. 29