CP3BT13 datasheet(67/232 Pages) NSC

67 / 232 page

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14.1.6

Port High Drive Strength Register (PxHDRV)

The PxHDRV register is a byte-wide, read/write register that

controls the slew rate of the corresponding pins. The high

drive strength function is enabled when the corresponding

bits of the PxHDRV register are set. In both GPIO and alter-

nate function modes, the drive strength function is enabled

by the PxHDRV registers. At reset, the PxHDRV registers

are cleared, making the ports low speed.

PxHDRV

The PxHDRV bits control whether output pins

are driven with slow or fast slew rate.

– Slow slew rate.

– Fast slew rate.

14.1.7

Port Alternate Function Select Register

(PxALTS)

The PxALTS register selects which of two alternate func-

tions are selected for the port pin. These bits are ignored

unless the corresponding PxALT bits are set. Each port pin

can be controlled independently.

PxALTS

The PxALTS bits select among two alternate

functions. Table 31 shows the mapping of the

PxALTS bits to the alternate functions. Un-

used PxALTS bits must be clear.

14.2

OPEN-DRAIN OPERATION

A port pin can be configured to operate as an inverting

open-drain output buffer. To do this, the CPU must clear the

bit in the data output register (PxDOUT) and then use the

port direction register (PxDIR) to set the value of the port

pin. With the direction register bit set (direction = out), the

value zero is forced on the pin. With the direction register bit

clear (direction = in), the pin is placed in the TRI-STATE

mode. If desired, the internal weak pull-up can be enabled

to pull the signal high when the output buffer is in TRI-

STATE mode.

PxHDRV

PxALTS

Table 31

Alternate Function Select

Port Pin

PxALTS = 0

PxALTS = 1

PG0

RXD

WUI10

PG1

TXD

WUI11

PG2

RTS

WUI12

PG3

CTS

WUI13

PG4

CKX

PG5

SRFS

NMI

PG6

CANRX

WUI14

PG7

CANTX

WUI15

PH0

MSK

TIO1

PH1

MDIDO

TIO2

PH2

MDODI

TIO3

PH3

MWCS

TIO4

PH4

SCK

TIO5

PH5

SFS

TIO6

PH6

STD

TIO7

PH7

SRD

TIO8

PI0

RFSYNC

Reserved

PI1

RFCE

Reserved

PI2

BTSEQ1

SRCLK

PI3

SCLK

Reserved

PI4

SDAT

Reserved

PI5

SLE

Reserved

PI6

WUI9

BTSEQ6

PI7

BTSEQ7

CP3BT13 Datasheet(PDF) 67 Page - National Semiconductor (TI)

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