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PC8374L Datasheet(PDF) 101 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 101 Page - National Semiconductor (TI) |
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101 / 239 page  4.0 System Wake-Up Control (SWC) (Continued) Revision 1.1 101 www.national.com 4.4.4 General-Purpose Status 1 Register 0 (GPE1_STS_0) This register contains “child” events 0-7 of the GPE1_STS register. The status bits behave according to the Sticky Status Bit definition in the ACPI Specification (i.e., the bit is set when the hardware signal is high and is only cleared by the software writing 1 to it). Power Well: VSB3 Location: Offset 08h Type: R/W1C 4.4.5 General-Purpose Status 1 Register 1 (GPE1_STS_1) This register contains “child” events 8-15 of the GPE1_STS register. The status bits behave according to the Sticky Status Bit definition in the ACPI Specification (i.e., the bit is set when the hardware signal is high and is only cleared by the software writing 1 to it). Power Well: VSB3 Location: Offset 09h Type: R/W1C Bit 76543210 Name GPIOE07 _STS GPIOE06 _STS GPIOE05 _STS GPIOE04 _STS GPIOE03 _STS GPIOE02 _STS GPIOE01 _STS GPIOE00 _STS Reset 00000000 Bit Description 7 GPIOE07_STS (GPIOE07 Event Status). Indicates that an active event has been detected at pin 7 of GPIOE Port 0. The event has programmable polarity and the debounce option (see Section 6.3 on page 113). The bit is set by an active level at the GPIOE07 pin. Writing 1 clears this bit; writing 0 is ignored. 0: Inactive since last cleared (default) 1: An active event has occurred 6-0 GPIOE06_STS to GPIOE00_STS (GPIOE06 to GPIOE00 Event Status). Same as above for pins 6-0 of GPIOE Port 0. Bit 76543210 Name GPIOE17 _STS GPIOE16_ STS Reserved GPIOE14 _STS GPIOE13 _STS GPIOE12 _STS GPIOE11 _STS GPIOE10 _STS Reset 00000000 Bit Description 7 GPIOE17_STS (GPIOE17 Event Status). Indicates that an active event has been detected at pin 7 of GPIOE Port 1. The event has programmable polarity and the debounce option (see Section 6.3 on page 113). The bit is set by an active level at the GPIOE17 pin. Writing 1 clears this bit; writing 0 is ignored. 0: Inactive since last cleared (default) 1: An active event has occurred 6 GPIOE16_STS (GPIOE16 Event Status). Same as above for pin 6 of GPIOE Port 1. 5 Reserved. 4-0 GPIOE14_STS to GPIOE10_STS (GPIOE14 to GPIOE10 Event Status). Same as above for pins 4-0 of GPIOE Port 1. Winbond Electronics Corp. Advanced PC Product Center |
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