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PC8374L Datasheet(PDF) 104 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 104 Page - National Semiconductor (TI) |
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104 / 239 page  4.0 System Wake-Up Control (SWC) (Continued) www.national.com 104 Revision1.1 4.4.8 General-Purpose Enable 1 Register 0 (GPE1_EN_0) This register contains “child” events 0-7 of the GPE1_EN register. The enable bits behave according to the Enable Bit definition in the ACPI Specification (i.e., the bit can be read or written by software). Power Well: VSB3 Location: Offset 0Ch Type: R/W 4.4.9 General-Purpose Enable 1 Register 1 (GPE1_EN_1) This register contains “child” events 8-15 of the GPE1_EN register. The enable bits behave according to the Enable Bit definition in the ACPI Specification (i.e., the bit can be read or written by software). Power Well: VSB3 Location: Offset 0Dh Type: R/W Bit 76543210 Name GPIOE07 _EN GPIOE06 _EN GPIOE05 _EN GPIOE04 _EN GPIOE03 _EN GPIOE02 _EN GPIOE01 _EN GPIOE00 _EN Reset 00000000 Bit Description 7 GPIOE07_EN (GPIOE07 Event Enable). Enables an active event at pin 7 of GPIOE Port 0 to set PME_STS bit in GPE1_STS register. 0: Disable event (default) 1: Enable event to set PME_STS 6-0 GPIOE06_EN to GPIOE00_EN (GPIOE06 to GPIOE00 Event Enable). Same as above for pins 6-0 of GPIOE Port 0. Bit 76543210 Name GPIOE17 _EN GPIOE16 _EN Reserved GPIOE14 _EN GPIOE13 _EN GPIOE12 _EN GPIOE11 _EN GPIOE10 _EN Reset 00000000 Bit Description 7 GPIOE17_EN (GPIOE17 Event Enable). Enables an active event at pin 7 of GPIOE Port 1 to set PME_STS bit in GPE1_STS register. 0: Disable event (default) 1: Enable event to set PME_STS 6 GPIOE16_EN (GPIOE16 Event Enable). Same as above for pin 6 of GPIOE Port 1. 5 Reserved. 4-0 GPIOE14_EN to GPIOE10_EN (GPIOE14 to GPIOE10 Event Enable). Same as above for pins 4-0 of GPIOE Port 1. Winbond Electronics Corp. Advanced PC Product Center |
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