PC8374L datasheet(163/239 Pages) NSC

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8.0 Health Management (HM) (Continued)

Revision 1.1

163

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8.5.21 Version

Version and stepping identifiers.

Location: 3Fh

Type:

8.5.22 Configuration

Configuration register.

Location: 40h

Type:

Varies per bit

Bit

76543210

Name

VER

STEP

Reset

01101000

Bit

Description

7-4

VER. HM version.

3-0

STEP. HM version stepping. For A0 stepping, the value is 1000b; for A1 it is 1001b; for A2 it is 1010b, etc.

Bit

76543210

Name

Reserved

SMBR

OVRID

READY

LOCK

START

Reset

00000000

Bit

Type

Description

7-5

R/W

Reserved.

R/W

SMBR (SMBus Read). When set to 1, access through the SMBus is read-only. This bit can be set only

through the LPC Bus. It is read-only for access through the SMBus.

0: Full SMBus access to the HM registers (default)

1: Read-only SMBus access to the HM registers

R/W

OVRID (Override FANPWM Conﬁguration). When set to 1, all FANPWM outputs are set to the value

contained in the MAX_PWM ﬁeld of the associated FANPWMn MAX Duty registers (see Section 8.5.82

on page 189 to Section 8.5.84) regardless of LOCK bit.

0: FANPWM outputs are controlled by Fan Control Configuration register; see Section 8.5.76 on page 187 to

Section 8.5.78 (default)

1: FANPWM outputs are set to MAX_PWM duty cycle

2RO

READY. Is set to 1 when the HM is ready for operation. While Ready is 0 Health monitoring and Fan

control functions are disabled.

0: The HM is reset or initializing (default)

1: The HM is enabled and ready for operation

R/W

or RO

LOCK. When set to 1, locks itself and the following HM registers: FANPWM1-3 Control Conﬁguration,

Fan1-3 Auto Speed Range and PWM Frequency, Min/Off Spike Smoothing 1-2, FANPWM1-3 Minimum,

Zone1-Zone3 Temperature Limit, Zone1-Zone3 Absolute temperature Limit, Zone1, Zone2, Zone3

Hysteresis, Extended FANPWM Control 1, Extended FANPWM Control 2, Monitoring Control, Tachometer

Monitoring Control, Channels VDD Conﬁguration, Temperature Zones1-3 Gain and Offset Correction,

FANPWM1-3 Maximum Duty.

This bit is reset by Hardware reset.

0: All R/W HM registers are enabled for write (default)

1: Specified HM registers are RO

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PC8374L Datasheet(PDF) 163 Page - National Semiconductor (TI)

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