PT2000 datasheet(89/148 Pages) NXP

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NXP Semiconductors

PT2000

8.3.1

Selection register (3FFh)

The selection register is a 4-bit register aimed to select, before starting the read/write operations toward a given address, which internal

code RAM is accessed or to select all the other addresses (including the 3 data RAMs and all the registers).

Table 57 details the meaning of the 4 bits in this register. Not all possible values are allowed for this register.

This selection register is accessible at address 3FFh and is the only register accessed anyway from the SPI, whatever the value of the

selection register. This means address 3FFh can only be used for this purpose, even if any of the code RAMs is selected, so each 1024x16

code RAM in the MC33PT2000 can actually only store 1023 data. Note that 2 or 3 code RAMs can be written in parallel during normal

mode.

Table 56. selection_register (3FFh)

Bit

Name

Reserved

comm.

page

sel

Reserved

CRAM_

ch3_sel

CRAM_

ch2_sel

CRAM_

ch1_sel

R/W

r/w

Lock

Reset

0000000

00000

Table 57. Selection register

Selection register

comm. page sel

Selection register

CRAM chx

Element addressed

‘0’

“000”

Nothing selected. Further SPI operation, except for the one concerning this register is ignored.

‘0’

“001”

Channel 1 Code RAM selected

‘0’

“010”

Channel 2 Code RAM selected

‘0’

“100”

Channel 3 Code RAM selected

‘0’

“011”

Write operation affects the Code RAM of channel 1 and 2. Read operation is not possible.

‘0’

“101”

Write operation affects the Code RAM of channel 1 and 3. Read operation is not possible.

‘0’

“110”

Write operation affects the Code RAM of channel 2 and 3. Read operation is not possible.

‘0’

“111”

Write operation affects the all three channel’s Code RAM. Read operation is not possible.

‘1’

d.c.

Common page selected. The lower three bits are ignored. “100000000” is written to the register.

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